NS32FX161-15 Datasheet, PDF (15/102 Pages) National Semiconductor (TI) – Advanced Imaging/Communication Signal Processors

2 0 Architectural Description (Continued)
TABLE 2-1 NS32FX164 Addressing Modes
ENCODING
MODE
Register
00000
Register 0
00001
Register 1
00010
Register 2
00011
Register 3
00100
Register 4
00101
Register 5
00110
Register 6
00111
Register 7
Register Relative
01000
Register 0 relative
01001
Register 1 relative
01010
Register 2 relative
01011
Register 3 relative
01100
Register 4 relative
01101
Register 5 relative
01110
Register 6 relative
01111
Register 7 relative
Memory Relative
10000
Frame memory relative
10001
Stack memory relative
10010
Static memory relative
ASSEMBLER SYNTAX
R0 or F0
R1 or F1
R2 or F2
R3 or F3
R4 or F4
R5 or F5
R6 or F6
R6 or F7
disp(R0)
disp(R1)
disp(R2)
disp(R3)
disp(R4)
disp(R5)
disp(R6)
disp(R7)
disp2(disp1 (FP))
disp2(disp1 (SP))
disp2(disp1 (SB))
Reserved
10011
Immediate
10100
(Reserved for Future Use)
Immediate
value
Absolute
10101
External
10110
Absolute
External
disp
EXT (disp1) a disp2
Top Of Stack
10111
Top of stack
TOS
Memory Space
11000
11001
11010
11011
Scaled Index
11100
11101
11110
11111
Frame memory
Stack memory
Static memory
Program memory
Index bytes
Index words
Index double words
Index quad words
disp(FP)
disp(SP)
disp(SB)
a disp
mode Rn B
mode Rn W
mode Rn D
mode Rn Q
EFFECTIVE ADDRESS
None Operand is in the specified
register
Disp a Register
Disp2 a Pointer Pointer found at
address Disp 1 a Register ‘‘SP’’
is either SP0 or SP1 as selected
in PSR
None Operand is input from
instruction queue
Disp
Disp2 a Pointer Pointer is found
at Link Table Entry number Disp1
Top of current stack using either
User or Interrupt Stack Pointer
as selected in PSR Automatic
Push Pop included
Disp a Register ‘‘SP’’ is either
SP0 or SP1 as selected in PSR
EA (mode) a Rn
EA (mode) a 2cRn
EA (mode) a 4cRn
EA (mode) a 8cRn
‘‘Mode’’ and ‘‘n’’ are contained
within the Index Byte
EA (mode) denotes the effective
address generated using mode
15