NS32FX161-15 Datasheet, PDF (18/102 Pages) National Semiconductor (TI) – Advanced Imaging/Communication Signal Processors

2 0 Architectural Description (Continued)
Format
TABLE 2-2 NS32FX164 Instruction Set Summary (Continued)
Operation
Operands
Description
5
MOVSi
options
MOVST
options
5
CMPSi
options
CMPST
options
5
SKPSi
options
SKPST
options
Move string 1 to string 2
Move string translating bytes
Compare string 1 to string 2
Compare translating string 1 bytes
Skip over string 1 entries
Skip translating bytes for until while
JUMPS AND LINKAGE
Format
Operation
Operands
Description
3
JUMP
gen
Jump
0
BR
disp
Branch (PC Relative)
0
Bcond
disp
Conditional branch
3
CASEi
gen
Multiway branch
2
ACBi
short gen disp
Add 4-bit constant and branch if non-zero
3
JSR
gen
Jump to subroutine
1
BSR
disp
Branch to subroutine
1
CXP
disp
Call external procedure
3
CXPD
gen
Call external procedure using descriptor
1
SVC
Supervisor call
1
FLAG
Flag trap
1
BPT
Breakpoint trap
1
ENTER
reg list disp
Save registers and allocate stack frame (Enter Procedure)
1
EXIT
reg list
Restore registers and reclaim stack frame (Exit Procedure)
1
RET
disp
Return from subroutine
1
RXP
disp
Return from external procedure call
1
RETT
disp
Return from trap (Privileged)
1
RETI
Return from interrupt (Privileged)
CPU REGISTER MANIPULATION
Format
Operation
Operands
Description
1
SAVE
reg list
Save general purpose registers
1
RESTORE
reg list
Restore general purpose registers
2
LPRi
areg gen
Load dedicated register (Privileged if PSR or INTBASE)
2
SPRi
areg gen
Store dedicated register (Privileged if PSR or INTBASE)
3
ADJSPi
gen
Adjust stack pointer
3
BISPSRi
gen
Set selected bits in PSR (Privileged if not Byte length)
3
BICPSRi
gen
Clear selected bits in PSR (Privileged if not Byte length)
5
SETCFG
option list
Set configuration register (Privileged)
18