MC68HC11F1 Datasheet, PDF (65/68 Pages) Motorola, Inc – Technical Summary 8-Bit Microcontroller

Bits[7:6] — See 12.2 Timer Registers, page 62.
PAOVI — Pulse Accumulator Overflow Interrupt Enable
0 = Pulse accumulator overflow interrupt disabled
1 = Interrupt requested when PAOVF in TFLG2 is set
PAII — Pulse Accumulator Interrupt Enable
0 = Pulse accumulator interrupt disabled
1 = Interrupt requested when PAIF in TFLG2 is set
Bits [3:2] — Not implemented. Reads always return zero and writes have no effect.
Bits [1:0] — See 12.2 Timer Registers, page 62.
TFLG2 — Timer Interrupt Flag 2
$x025
Bit 7
6
5
4
3
2
1
Bit 0
TOF
RTIF PAOVF PAIF
0
0
0
0
RESET:
0
0
0
0
0
0
0
0
Bits in TFLG2 are cleared by writing a one to the corresponding bit positions.
Bits [7:6] — See 12.2 Timer Registers, page 62.
PAOVF — Pulse Accumulator Overflow Flag
Set when PACNT rolls over from $FF to $00
PAIF — Pulse Accumulator Input Edge Flag
Set each time a selected active edge is detected on the PAI input line
Bits [3:0] — Not implemented. Reads always return zero and writes have no effect.
PACTL — Pulse Accumulator Control
Bit 7
6
5
4
3
2
1
0
PAEN PAMOD PEDGE
0
I4/O5
RTR1
RESET:
0
0
0
0
0
0
0
Bit 0
RTR0
0
$x026
Bit 7 — Not implemented. Reads always return zero and writes have no effect.
PAEN — Pulse Accumulator System Enable
0 = Pulse accumulator disabled
1 = Pulse accumulator enabled
PAMOD — Pulse Accumulator Mode
0 = Event counter
1 = Gated time accumulation
PEDGE — Pulse Accumulator Edge Control
This bit has different meanings depending on the state of the PAMOD bit, as shown in Table 33.
MC68HC11F1/FC0
MC68HC11FTS/D
MOTOROLA
65