MC68HC11F1 Datasheet, PDF (39/68 Pages) Motorola, Inc – Technical Summary 8-Bit Microcontroller

Table 16 Chip Select Clock Stretch Control
Clock Stretch
Bits A, B
00
01
10
11
Clock Stretch
0 Cycles
1 Cycle
2 Cycles
3 Cycles
CSCTL — Chip-Select Control
Bit 7
6
IO1EN IO1PL
RESET:
0
0
5
IO2EN
0
4
IO2PL
0
3
GCSPR
0
2
PCSEN*
—
1
PSIZA
0
* PCSEN is set out of reset in expanded modes and cleared in single-chip modes.
IO1EN — I/O Chip-Select 1 Enable
0 = CSIO1 disabled
1 = CSIO1 enabled
IO1PL — I/O Chip-Select 1 Polarity
0 = CSIO1 active low
1 = CSIO1 active high
IO1EN — I/O Chip-Select 2 Enable
0 = CSIO2 disabled
1 = CSIO2 enabled
IO2PL — I/O Chip-Select 2 Polarity
0 = CSIO2 active low
1 = CSIO2 active high
GCSPR — General-Purpose Chip-Select Priority
0 = Program chip-select has priority over general-purpose chip-select
1 = General-purpose chip-select has priority over program chip-select
Refer to Table 17.
Table 17 Chip Select Priorities
GCSPR = 0
GCSPR = 1
On-Chip Registers
On-Chip Registers
On-Chip RAM
On-Chip RAM
Bootloader ROM
On-Chip EEPROM¹
Bootloader ROM
On-Chip EEPROM¹
I/O Chip Selects
I/O Chip Selects
Program Chip Select
General-Purpose Chip Select
General-Purpose Chip Select
Program Chip Select
NOTES:
1. EEPROM is present on the MC68HC11F1 only.
Bit 0
PSIZB
0
$x05D
MC68HC11F1/FC0
MC68HC11FTS/D
MOTOROLA
39