MC68HC11F1 Datasheet, PDF (46/68 Pages) Motorola, Inc – Technical Summary 8-Bit Microcontroller

SCCR1 — SCI Control Register 1
Bit 7
6
5
R8
T8
0
RESET:
U
U
0
4
3
2
M
WAKE
0
0
0
0
$x02C
1
Bit 0
0
0
0
0
U = Unaffected by reset
R8 — Receive Data Bit 8
If M is set, R8 stores the ninth bit of the receive data character.
T8 — Transmit Data Bit 8
If M is set, T8 stores the ninth bit of the transmit data character.
Bit 5 — Not implemented. Reads always return zero and writes have no effect.
M — Mode (Select Character Format)
0 = 1 start bit, 8 data bits, 1 stop bit
1 = 1 start bit, 9 data bits, 1 stop bit
WAKE — Wake Up by Address Mark/Idle
0 = Wake up by IDLE line recognition
1 = Wake up by address mark
Bits [2:0] — Not implemented. Reads always return zero and writes have no effect.
SCCR2 — SCI Control Register 2
Bit 7
6
5
4
3
2
1
Bit 0
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
RESET:
0
0
0
0
0
0
0
0
$x02D
TIE — Transmit Interrupt Enable
0 = TDRE interrupts disabled
1 = SCI interrupt requested when the TDRE flag is set
TCIE — Transmit Complete Interrupt Enable
0 = TC interrupts disabled
1 = SCI interrupt requested when the TC flag is set
RIE — Receiver Interrupt Enable
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when the RDRF flag or the OR flag is set
ILIE — Idle Line Interrupt Enable
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
TE — Transmitter Enable
When TE goes from zero to one, one unit of idle character time (logic one) is queued as a preamble.
0 = Transmitter disabled
1 = Transmitter enabled
RE — Receiver Enable
0 = Receiver disabled
1 = Receiver enabled
MOTOROLA
46
MC68HC11F1/FC0
MC68HC11FTS/D