MC68HC11F1 Datasheet, PDF (53/68 Pages) Motorola, Inc – Technical Summary 8-Bit Microcontroller

11 Analog-to-Digital Converter
The MC68HC11F1 analog-to-digital (A/D) converter system uses an all-capacitive charge-redistribution
technique to convert analog signals to digital values. The A/D system is an 8-channel, 8-bit, multiplexed-
input, successive-approximation converter, accurate to ±1 least significant bit (LSB). Because the ca-
pacitive charge redistribution technique used includes a built-in sample-and-hold, no external sample-
and-hold is required.
Dedicated lines V_RH and V_RL provide the reference supply voltage inputs. Systems operating at clock
rates of 750 kHz or below must use an internal RC oscillator. The CSEL bit in the OPTION register se-
lects the clock source for the A/D system. (The CSEL bit is described in 11.3 A/D Registers, page 56.)
A multiplexer allows the single A/D converter to select one of 16 analog signals, as shown in Table 24.
NOTE
The A/D converter is present on the MC68HC11F1 only.
PE0
AN0
PE1
AN1
PE2
AN2
PE3
AN3
ANALOG
MUX
PE4
AN4
PE5
AN5
PE6
AN6
PE7
AN7
8-BIT CAPACITIVE DAC
WITH SAMPLE AND HOLD
SUCCESSIVE APPROXIMATION
REGISTER AND CONTROL
RESULT
ADCTL A/D CONTROL
V_RH
V_RL
INTERNAL
DATA BUS
RESULT REGISTER INTERFACE
ADR1 A/D RESULT 1
ADR2 A/D RESULT 2
ADR3 A/D RESULT 3
ADR4 A/D RESULT 4
Figure 14 A/D Converter Block Diagram
MC68HC11F1/FC0
MC68HC11FTS/D
EA9 A/D BLOCK
MOTOROLA
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