MC68HC11F1 Datasheet, PDF (55/68 Pages) Motorola, Inc – Technical Summary 8-Bit Microcontroller

11.3 A/D Registers
ADCTL — A/D Control/Status
$x030
Bit 7
6
5
4
3
2
1
Bit 0
CCF
0
SCAN MULT
CD
CC
CB
CA
RESET:
I
0
I
I
I
I
I
I
I = Indeterminate value
CCF — Conversions Complete Flag
A read-only status indicator, this bit is set when all four A/D result registers contain valid conversion re-
sults. Each time the ADCTL register is overwritten, this bit is automatically cleared to zero and a con-
version sequence is started. In the continuous mode, CCF is set at the end of the first conversion
sequence.
Bit 6 — Not implemented. Reads always return zero and writes have no effect.
SCAN — Continuous Scan Control
0 = Do four conversions and stop
1 = Convert four channels in selected group continuously
MULT — Multiple Channel/Single Channel Control
0 = Convert single channel selected
1 = Convert four channels in selected group
CD–CA — Channel Select D through A
Refer to Table 24. When a multiple channel mode is selected (MULT = 1), the two least significant chan-
nel select bits (CB and CA) have no meaning and the CD and CC bits specify which group of four chan-
nels is to be converted.
Table 24 A/D Converter Channel Assignments
Channel Select Control Bits
CD:CC:CB:CA
0000
0001
0010
0011
0100
0101
0110
0111
10XX
1100
1101
1110
1111
NOTES:
1. Used for factory testing.
Channel Signal
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Reserved
V_RH1
V_RL1
(V_RH)/2¹
Reserved¹
Result in ADRx if MULT = 1
ADR1
ADR2
ADR3
ADR4
ADR1
ADR2
ADR3
ADR4
ADR1–ADR4
ADR1
ADR2
ADR3
ADR4
MC68HC11F1/FC0
MC68HC11FTS/D
MOTOROLA
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