MC68HC11F1 Datasheet, PDF (40/68 Pages) Motorola, Inc – Technical Summary 8-Bit Microcontroller

PCSEN — Program Chip-Select Enable
Reset clears PCSEN in single-chip modes and sets PCSEN in expanded modes.
0 = CSPROG disabled
1 = CSPROG enabled
PSIZA, PSIZB — Select Size of Program Chip-Select
Table 18 Program Chip Select Size Control
PSIZA
0
0
1
1
PSIZB
0
1
0
1
Size
64 Kbytes
32 Kbytes
16 Kbytes
8 Kbytes
Address Range
$0000–$FFFF
$8000–$FFFF
$C000–$FFFF
$E000–$FFFF
CSGADR — General-Purpose Chip-Select Address Register
Bit 7
6
5
4
3
2
1
GA15
GA14
GA13
GA12
GA11
GA10
—
RESET:
0
0
0
0
0
0
0
$x05E
Bit 0
—
0
GA[15:10] — General-Purpose Chip-Select Starting Address
These bits determine the starting address of the CSGEN valid address space and correspond to the
high-order address bits ADDR[15:10]. Table 19 illustrates how the block size selected determines
which of this register's bits are valid.
Table 19 General Purpose Chip Select Starting Address
CSGEN Block Size
0 Kbytes
1 Kbyte
2 Kbytes
4 Kbytes
8 Kbytes
16 Kbytes
32 Kbytes
64 Kbytes
CSGADR Bits Valid
None
GA15 – GA10
GA15 – GA11
GA15 – GA12
GA15 – GA13
GA15 – GA14
GA15
None
Bits [1:0] — Not implemented. Reads always return zero and writes have no effect.
CSGSIZ — General-Purpose Chip-Select Size Register
Bit 7
6
5
4
3
2
1
IO1AV IO2AV
—
GNPOL GAVLD GSIZA GSIZB
RESET:
0
0
0
0
0
1
1
IO1AV — I/O Chip-Select 1 Address Valid
0 = CSIO1 is valid during E-clock valid time (E-clock high)
1 = CSIO1 is valid during address valid time
IO2AV — I/O Chip-Select 2 Address Valid
0 = CSIO2 is valid during E-clock valid time (E-clock high)
1 = CSIO2 is valid during address valid time
Bit 0
GSIZC
1
$x05F
MOTOROLA
40
MC68HC11F1/FC0
MC68HC11FTS/D