M306V5ME-XXXSP Datasheet, PDF (93/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
UART0 transmit/receive mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U0MR
Address
03A016
When reset
0016
Bit
symbol
Bit name
SMD0 _{Serial I/O mode select bit}
SMD1
SMD2
Function
(During clock synchronous
serial I/O mode)
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
CKDIR Internal/external clock
select bit
STPS _{Stop bit length select bit}
0 : Internal clock
1 : External clock
Invalid
PRY Odd/even parity select bit Invalid
PRYE Parity enable bit
SLEP Sleep select bit
Invalid
Must always be “0”
Function
(During UART mode)
RW
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
0 : Internal clock
1 : External clock
0 : One stop bit
1 : Two stop bits
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : Sleep mode deselected
1 : Sleep mode selected
Figure 2.11.7 UART0 transmit/receive mode register
UART2 transmit/receive mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
U2MR
Address
037816
When reset
0016
Bit
symbol
Bit name
Function
(During clock synchronous
serial I/O mode)
SMD0 _{Serial I/O mode select bit}
SMD1
SMD2
Must be fixed to 001
b2 b1 b0
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
CKDIR Internal/external clock
select bit
STPS _{Stop bit length select bit}
0 : Internal clock
1 : External clock
Invalid
PRY Odd/even parity select bit Invalid
PRYE Parity enable bit
IOPOL ^{TxD, RxD I/O polarity}
reverse bit
Invalid
0 : No reverse
1 : Reverse
Usually set to “0”
Function
(During UART mode)
RW
b2 b1 b0
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
0 0 0 : Serial I/O invalid
0 1 0 : Inhibited
0 1 1 : Inhibited
1 1 1 : Inhibited
0 : Internal clock
1 : External clock
0 : One stop bit
1 : Two stop bits
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
Usually set to “0”
Figure 2.11.8 UART2 transmit/receive mode register
Rev. 1.0
93