M306V5ME-XXXSP Datasheet, PDF (181/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Both HSYNC signal and VSYNC signal are negative-polarity input
HSYNC
Field
Field
determination
flag(Note)
Display dot line
selection bit
Display dot line
VSYNC and
(n - 1) field
VSYNC
(Odd-numbered)
control
signal
T1
in microcom-
puter
Upper :
VSYNC signal
(n) field
(Even-numbered)
T2
Lower :
VSYNC control
signal in
micro-
computer
(n + 1) field
(Odd-numbered)
T3
0.5 to 0.1 [ms] at
f(BCLK) = 10 MHz
Odd
0
Even 0 (T2 > T1)
1
0
Odd
1 (T3 < T2)
1
Dot line 1
Dot line 0
Dot line 0
Dot line 1
When using the field determination flag, set bit 7 of the peripheral mode register (address 027D16) according to the main clock frequency.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
CC mode · CDOSD mode
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
OSDS mode
When the display dot line selection bit is “0,”
the “ ” font is displayed at even field, the
“ ” font is displayed at odd field. Bit 7 of the
I/O polarity control register can be read as the
field determination flag : “1” is read at odd field,
“0” is read at even field.
OSD ROM font configuration diagram
Note : The field determination flag changes at a rising edge of the VSYNC control signal (negative-polarity input) in
the microcomputer.
Figure 2.16.18 Relation between field determination flag and display font
Rev. 1.0
181