M306V5ME-XXXSP Datasheet, PDF (92/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
UARTi transmit buffer register
(b15)
b7
(b8)
b0 b7
Symbol
b0
U0TB
U2TB
Address
03A316, 03A216
037B16, 037A16
When reset
Indeterminate
Indeterminate
Function
Transmit data (Note)
Nothing is assigned.
In an attempt to write to these bits, write “0.” The value, if read, turns out to be indeterminate.
RW
Figure 2.11.4 UARTi transmit buffer register (i = 0 and 2)
UARTi receive buffer register
(b15)
b7
(b8)
b0 b7
0
Symbol
Address
When reset
b0
U0RB 03A716, 03A616 Indeterminate
U2RB 037F16, 037E16 Indeterminate
Bit
symbol
Bit name
Function
(During clock synchronous
serial I/O mode)
Receive data
Function
(During UART mode)
Receive data
Nothing is assigned.
In an attempt to write to these bits, write “0.” The value, if read, turns out to be “0.”
Reserved bit
Must always be set to “0”
Must always be set to “0”
RW
OER Overrun error flag (Note 1) 0 : No overrun error
1 : Overrun error found
FER Framing error flag (Note 1) Invalid
PER Parity error flag (Note 1) Invalid
SUM Error sum flag (Note 1) Invalid
0 : No overrun error
1 : Overrun error found
0 : No framing error
1 : Framing error found
0 : No parity error
1 : Parity error found
0 : No error
1 : Error found
Notes 1: Bits 15 through 12 are set to “0” when the serial I/O mode select bit (bits 2 to 0 at addresses
03A016 and 037816) are set to “0002” or the receive enable bit is set to “0”.
(Bit 15 is set to “0” when bits 14 to 12 all are set to “0.”) Bits 14 and 13 are also set to “0” when
the lower byte of the UARTi receive buffer register (addresses 03A6 16 and 037E16) is read out.
2: The arbtration lost detecting flag is assigned to U2RB and is written only “0.” Nothing is
assinged to bit 11 of U0RB. This bit can neither be set nor reset, when read, he the value is “0.”
Figure 2.11.5 UARTi receive buffer register (i = 0 and 2)
UARTi bit rate generator
b7
b0
Symbol
U0BRG
U2BRG
Address
03A116
037916
When reset
Indeterminate
Indeterminate
Function
Assuming that set value = n, BRGi divides the count source by
n+1
Values that can be set
0016 to FF16
RW
Figure 2.11.6 UARTi bit rate generator (i = 0 and 2)
92
Rev. 1.0