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M306V5ME-XXXSP Datasheet, PDF (113/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER | |||
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MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.11.4 Clock-asynchronous Serial I/O Mode (Compliant with the SIM Interface)
The SIM interface is used for connecting the microcomputer with a memory card I/C or the like; adding
some extra settings in UART2 clock-asynchronous serial I/O mode allows the user to effect this function.
Tables 2.11.8 and 2.11.9 show the specifications of clock-asynchronous serial I/O mode (compliant with
the SIM interface).
Table 2.11.8 Specifications of clock-asynchronous serial I/O mode (compliant with the SIM
interface) (1)
Item
Specification
Transfer data format
⢠Transfer data 8-bit UART mode (bit 2 through bit 0 of address 037816 = â1012â)
⢠One stop bit (bit 4 of address 037816 = â0â)
⢠With the direct format chosen
Set parity to âevenâ (bit 5 and bit 6 of address 037816 = â1â and â1â respectively)
Set data logic to âdirectâ (bit 6 of address 037D16 = â0â).
Set transfer format to LSB (bit 7 of address 037C16 = â0â).
⢠With the inverse format chosen
Set parity to âoddâ (bit 5 and bit 6 of address 037816 = â0â and â1â respectively)
Set data logic to âinverseâ (bit 6 of address 037D16 = â1â)
Set transfer format to MSB (bit 7 of address 037C16 = â1â)
Transfer clock
⢠With the internal clock chosen (bit 3 of address 037816 = â0â) :
fi / 16 (n + 1) (Note 1) : fi=f1, f8, f32
⢠With an external clock chosen (bit 3 of address 037816 = â1â) :
fEXT / 16 (n+1) (Note 1) (Note 2)
Other settings
⢠The sleep mode select function is not available for UART2
⢠Set transmission interrupt factor to âtransmission completedâ
(bit 4 of address 037D16 = â1â)
Transmission start condition ⢠To start transmission, the following requirements must be met:
- Transmit enable bit (bit 0 of address 037D16) = â1â
- Transmit buffer empty flag (bit 1 of address 037D16) = â0â
Reception start condition ⢠To start reception, the following requirements must be met:
- Reception enable bit (bit 2 of address 037D16) = â1â
- Detection of a start bit
Interrupt request
⢠When transmitting
generation timing
When data transmission from the UART2 transfer register is completed
(bit 4 of address 037D16 = â1â)
⢠When receiving
When data transfer from the UART2 receive register to the UART2 receive
buffer register is completed
Rev. 1.0
113
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