M306V5ME-XXXSP Datasheet, PDF (163/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.14.10 Data Clock Generating Circuit
This circuit generates a data clock synchronized with the start bit detected in the start bit detecting circuit.
The data clock stores caption data to the 16-bit shift register. When the 16-bit data has been stored and
the clock run-in determination circuit determines clock run-in, the caption data latch completion flag is set.
This flag is reset at a falling of the vertical synchronous signal (Vsep).
Data clock position register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DPS
Address
026A16
When reset
XXX000012
Bit symbol
Bit name
Function
DPS0
DPS1
DPS2
DPS3
DPS4
Data clock position
set bits
Nothing is assigned.
If an attempt to write to these bits, write “0.” The read turns out to be “0.”
RW
Figure 2.14.11 Data clock position register
2.14.11 16-bit Shift Register
The caption data converted into a digital value by the comparator is stored into the 16-bit shift register in
synchronization with the data clock. The contents of the stored caption data can be obtained by reading
out the caption data register 1 (addresses 026316, 026216) and caption data register 2 (addresses
026516, 026416). These registers are reset to “0” at a falling of Vsep. Read out data registers 1 and 2 after
the occurrence of a data slicer interrupt (refer to “2.14.12 Interrupt request generating circuit)”.
Rev. 1.0
163