M306V5ME-XXXSP Datasheet, PDF (178/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
2.16.3 Dot Size
The dot size can be selected by a block unit. The dot size in vertical direction is determined by dividing
HSYNC in the vertical dot size control circuit. The dot size in horizontal is determined by dividing the
following clock in the horizontal dot size control circuit : the clock gained by dividing the OSD clock source
(data slicer clock, OSC1, main clock) in the pre-divide circuit. The clock cycle divided in the pre-divide
circuit is defined as 1TC.
The dot size is specified by bits 3 to 6 of the block control register.
Refer to Figure 2.16.4 (the block control register i), refer to Figure 2.16.15 (the clock control register).
The block diagram of dot size control circuit is shown in Figure 2.16.13.
Notes 1 : The pre-divide ratio = 3 cannot be used in the CC mode.
2 : The pre-divide ratio of the layer 2 must be same as that of the layer 1 by the block control
register i.
3 : In the bi-scan mode, the dot size in the vertical direction is 2 times as compared with the normal
mode. Refer to “2.16.18 Scan Mode” about the scan mode.
OSC1
Data slicer
clock
(See note)
HSYNC
Synchronous
circuit
Cycle!2
Clock cycle
= 1TC
Cycle!3
Pre-divide circuit
Horizontal dot size
control circuit
Vertical dot size
control circuit
OSD control circuit
Note: To use data slicer clock, set bit 0 of data slicer control register 1 to “0.”
Figure 2.16.13 Block diagram of dot size control circuit
1 dot
1TC
1/2H
1TC
1H
2TC
2H
3TC
3H
Scanning line of F1 (F2)
Scanning line of F2 (F1)
In normal scan mode
Figure 2.16.14 Definition of dot sizes
178
Rev. 1.0