M306V5ME-XXXSP Datasheet, PDF (61/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
DMA1 request cause select register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DM1SL
Address
03BA16
When reset
0016
Bit symbol
Bit name
Function
RW
DSEL0
DMA request cause
select bit
b3 b2 b1 b0
0 0 0 0 : Falling edge of INT 1 pin
0 0 0 1 : Software trigger
0 0 1 0 : Timer A0
0 0 1 1 : Timer A1
0 1 0 0 : Timer A2
DSEL1
0 1 0 1 : Timer A3 (DMS = 0)
/OSD1 (DMS = 1)
0 1 1 0 : Timer A4 (DMS = 0)
/OSD2 (DMS = 1)
0 1 1 1 : Timer B0
DSEL2
/Multi-master I²C-BUS interface 1
(DMS = 1)
1 0 0 0 : Timer B1
1 0 0 1 : Timer B2
1 0 1 0 : UART0 transmit
1 0 1 1 : UART0 receive
DSEL3
1 1 0 0 : UART2 transmit
1 1 0 1 : UART2 receive
1 1 1 0 : A-D conversion
1 1 1 1 : VSYNC
Nothing is assigned.
In an attempt to write to these bits, write “0.”
The value, if read, turns out to be “0.”
DMS
DMA request
cause expansion bit
0 : Normal
1 : Expanded cause
DSR
Software DMA
request bit
If software trigger is selected, a
DMA request is generated by
setting this bit to “1” (When read,
the value of this bit is always “0”)
Figure 2.9.3 DMA1 request cause select register
DMAi control register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
DMiCON(i=0,1)
Address
002C16, 003C16
When reset
00000?002
Bit symbol
Bit name
Function
RW
DMBIT
Transfer unit bit select bit 0 : 16 bits
1 : 8 bits
DMASL
Repeat transfer mode
select bit
0 : Single transfer
1 : Repeat transfer
DMAS
DMA request bit (Note 1) ^{0 : DMA not requested}
1 : DMA requested
(Note 2)
DMAE
DSD
DMA enable bit
Source address direction
select bit (Note 3)
0 : Disabled
1 : Enabled
0 : Fixed
1 : Forward
DAD
Destination address
0 : Fixed
direction select bit (Note 3) _{1 : Forward}
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0.”
Notes 1:DMA request can be cleared by resetting the bit.
2:This bit can only be set to “0.”
3:Source address direction select bit and destination address direction select bit
cannot be set to “1” simultaneously.
Figure 2.9.4 DMAi control register (i = 0, 1)
Rev. 1.0
61