M306V5ME-XXXSP Datasheet, PDF (157/262 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
Figures 2.14.4 and 2.14.5 the data slicer control registers.
Data slicer control register 1
b7 b6 b5 b4 b3 b2 b1 b0
00000
Symbol
DSC1
Address
026016
When reset
0016
Bit symbol
DSC10
DSC11
DSC12
Bit name
Data slicer and timing signal
generating circuit control bit
Selection bit of data slice reference
voltage generating field
Reference clock source
selection bit
Reserved bits
Function
0: Stopped
1: Operating
0: F2
1: F1
0: Video signal
1: HSYNC signal
Must always be set to “0”
RW
Definition of fields 1 (F1) and 2 (F2)
F1: Hsep
Vsep
F2: Hsep
Vsep
Figure 2.14.4 Data slicer control register 1
Data slicer control register 2
b7 b6 b5 b4 b3 b2 b1 b0
0
0
Symbol
DSC2
Address
026116
When reset
?0?0??0?2
Bit symbol
DSC20
Bit name
Caption data latch
completion flag 1
Function
0: Data is not latched yet and a
clock-run-in is not determined.
1: Data is latched and a
clock-run-in is determined.
RW
Reserved bit
Test bit
DSC23
Field determination flag
Must always be set to “0”
Read-only
0: F2
1: F1
DSC24
DSC25
Vertical synchronous signal
(Vsep) generating method
selection bit
V-pulse shape
determination flag
0: Method (1)
1: Method (2)
0: Match
1: Mismatch
Reserved bit
Test bit
Must always be set to “0”
Read-only
Definition of fields 1 (F1) and 2 (F2)
F1: Hsep
Vsep
F2: Hsep
Vsep
Figure 2.14.5 Data slicer control register 2
Rev. 1.0
157