MT40A256M16GE-075E Datasheet, PDF (50/365 Pages) Micron Technology – Temperature controlled refresh (TCR)

4Gb: x4, x8, x16 DDR4 SDRAM
Mode Register 1
Output Disable
The device outputs may be enabled/disabled by MR1[12] as shown in the MR1 Register
Definition table. When MR1[12] is enabled (MR1[12] = 1) all output pins (such as DQ
and DQS) are disconnected from the device, which removes any loading of the output
drivers. For example, this feature may be useful when measuring module power. For
normal operation, set MR1[12] to 0.
Termination Data Strobe
Termination data strobe (TDQS) is a feature of the x8 device and provides additional
termination resistance outputs that may be useful in some system configurations. Be-
cause this function is available only in a x8 configuration, it must be disabled for x4 and
x16 configurations.
While TDQS is not supported in x4 or x16 configurations, the same termination resist-
ance function that is applied to the TDQS pins is applied to the DQS pins when enabled
via the mode register.
The TDQS, DBI, and DATA MASK (DM) functions share the same pin. When the TDQS
function is enabled via the mode register, the DM and DBI functions are not supported.
When the TDQS function is disabled, the DM and DBI functions can be enabled sepa-
rately.
Table 12: TDQS Function Matrix
TDQS
Disabled
Enabled
Data Mask (DM)
Enabled
Disabled
Disabled
Disabled
WRITE DBI
Disabled
Enabled
Disabled
Disabled
READ DBI
Enabled or disabled
Enabled or disabled
Enabled or disabled
Disabled
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4gb_ddr4_dram.pdf - Rev. G 1/17 EN
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