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MT40A256M16GE-075E Datasheet, PDF (48/365 Pages) Micron Technology – Temperature controlled refresh (TCR)
4Gb: x4, x8, x16 DDR4 SDRAM
Mode Register 1
Table 10: MR1 Register Definition (Continued)
Mode
Register
10, 9, 8
7
6, 5
4, 3
2, 1
0
Description
Nominal ODT (RTT(NOM) – Data bus termination setting
000 = RTT(NOM) disabled
001 = RZQ/4 (60 ohm)
010 = RZQ/2 (120 ohm)
011 = RZQ/6 (40 ohm)
100 = RZQ/1 (240 ohm)
101 = RZQ/5 (48 ohm)
110 = RZQ/3 (80 ohm)
111 = RZQ/7 (34 ohm)
Write leveling (WL) – Write leveling mode
0 = Disabled (normal operation)
1 = Enabled (enter WL mode)
RFU
0 = Must be programmed to 0
1 = Reserved
Additive latency (AL) – Command additive latency setting
00 = 0 (AL disabled)
01 = CL - 11
10 = CL - 2
11 = Reserved
Output driver impedance (ODI) – Output driver impedance setting
00 = RZQ/7 (34 ohm)
01 = RZQ/5 (48 ohm)
10 = Reserved (Although not JEDEC-defined and not tested, this setting will provide RZQ/6 or 40 ohm)
11 = Reserved
DLL enable – DLL enable feature
0 = DLL disabled
1 = DLL enabled (normal operation)
Note: 1. Not allowed when 1/4 rate gear-down mode is enabled.
DLL Enable/DLL Disable
The DLL must be enabled for normal operation and is required during power-up initial-
ization and upon returning to normal operation after having the DLL disabled. During
normal operation (DLL enabled with MR1[0]) the DLL is automatically disabled when
entering the SELF REFRESH operation and is automatically re-enabled upon exit of the
SELF REFRESH operation. Any time the DLL is enabled and subsequently reset, tDLLK
clock cycles must occur before a READ or SYNCHRONOUS ODT command can be is-
sued to allow time for the internal clock to be synchronized with the external clock. Fail-
ing to wait for synchronization to occur may result in a violation of the tDQSCK, tAON,
or tAOF parameters.
During tDLLK, CKE must continuously be registered HIGH. The device does not require
DLL for any WRITE operation, except when RTT(WR) is enabled and the DLL is required
for proper ODT operation.
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4gb_ddr4_dram.pdf - Rev. G 1/17 EN
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