MT40A256M16GE-075E Datasheet, PDF (251/365 Pages) Micron Technology – Temperature controlled refresh (TCR)

4Gb: x4, x8, x16 DDR4 SDRAM
On-Die Termination
On-Die Termination
The on-die termination (ODT) feature enables the device to change termination resist-
ance for each DQ, DQS, and DM_n/DBI_n signal for x4 and x8 configurations (and
TDQS for the x8 configuration when enabled via A11 = 1 in MR1) via the ODT control
pin, WRITE command, or default parking value with MR setting. For the x16 configura-
tion, ODT is applied to each DQU, DQL, DQSU, DQSL, DMU_n/DBIU_n, and DML_n/
DBIL_n signal. The ODT feature is designed to improve the signal integrity of the mem-
ory channel by allowing the DRAM controller to independently change termination re-
sistance for any or all DRAM devices. If DBI read mode is enabled while the DRAM is in
standby, either DM mode or DBI write mode must also be enabled if R_TT(NOM) or
R_TT(Park) is desired. More details about ODT control modes and ODT timing modes can
be found further along in this document.
The ODT feature is turned off and not supported in self refresh mode.
Figure 199: Functional Representation of ODT
To other
circuitry
such as
RCV,
...
ODT
R_TT
Switch
V_DDQ
DQ, DQS, DM, TDQS
The switch is enabled by the internal ODT control logic, which uses the external ODT
pin and other control information. The value of R_TT is determined by the settings of
mode register bits (see Mode Register). The ODT pin will be ignored if the mode register
MR1 is programmed to disable R_TT(NOM) [MR1[10,9,8] = 0,0,0] and in self refresh mode.
ODT Mode Register and ODT State Table
The ODT mode of the DDR4 device has four states: data termination disable, R_TT(NOM),
R_TT(WR), and R_TT(Park). The ODT mode is enabled if any of MR1[10:8] (R_TT(NOM)),
MR2[11:9] (R_TT(WR)), or MR5[8:6] (R_TT(Park)) are non-zero. When enabled, the value of
R_TT is determined by the settings of these bits.
R_TT control of each R_TT condition is possible with a WR or RD command and ODT pin.
• R_TT(WR): The DRAM (rank) that is being written to provide termination regardless of
ODT pin status (either HIGH or LOW).
• R_TT(NOM): DRAM turns ON R_TT(NOM) if it sees ODT asserted HIGH (except when ODT
is disabled by MR1).
• R_TT(Park): Default parked value set via MR5 to be enabled and R_TT(NOM) is not turned
on.
• The Termination State Table that follows shows various interactions.
The R_TT values have the following priority:
• Data termination disable
• R_TT(WR)
• R_TT(NOM)
• R_TT(Park)
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4gb_ddr4_dram.pdf - Rev. G 1/17 EN
251
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