N25Q128A13ESE40G Datasheet, PDF (4/81 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q128A

128Mb, 3V, Multiple I/O Serial Flash Memory
Features
List of Figures
Figure 1: Logic Diagram ................................................................................................................................... 7
Figure 2: 8-Pin, VDFPN8 – MLP8 and SOP2 – SO8W (Top View) ......................................................................... 8
Figure 3: 16-Pin, Plastic Small Outline – SO16 (Top View) .................................................................................. 8
Figure 4: 24-Ball TBGA (Balls Down) ................................................................................................................ 9
Figure 5: 24-Ball TBGA , 4x6 (Balls Down) ......................................................................................................... 9
Figure 6: Block Diagram ................................................................................................................................ 12
Figure 7: Bus Master and Memory Devices on the SPI Bus ............................................................................... 17
Figure 8: SPI Modes ....................................................................................................................................... 17
Figure 9: Internal Configuration Register ........................................................................................................ 19
Figure 10: READ REGISTER Command .......................................................................................................... 28
Figure 11: WRITE REGISTER Command ......................................................................................................... 30
Figure 12: READ LOCK REGISTER Command ................................................................................................. 32
Figure 13: WRITE LOCK REGISTER Command ............................................................................................... 33
Figure 14: READ ID and MULTIPLE I/O Read ID Commands .......................................................................... 35
Figure 15: READ Command ........................................................................................................................... 39
Figure 16: FAST READ Command ................................................................................................................... 39
Figure 17: DUAL OUTPUT FAST READ ........................................................................................................... 40
Figure 18: DUAL INPUT/OUTPUT FAST READ Command .............................................................................. 40
Figure 19: QUAD OUTPUT FAST READ Command ......................................................................................... 41
Figure 20: QUAD INPUT/OUTPUT FAST READ Command ............................................................................. 41
Figure 21: PAGE PROGRAM Command .......................................................................................................... 43
Figure 22: DUAL INPUT FAST PROGRAM Command ...................................................................................... 44
Figure 23: EXTENDED DUAL INPUT FAST PROGRAM Command ................................................................... 44
Figure 24: QUAD INPUT FAST PROGRAM Command ..................................................................................... 45
Figure 25: EXTENDED QUAD INPUT FAST PROGRAM Command ................................................................... 46
Figure 26: WRITE ENABLE and WRITE DISABLE Command Sequence ............................................................ 48
Figure 27: SUBSECTOR and SECTOR ERASE Command .................................................................................. 50
Figure 28: BULK ERASE Command ................................................................................................................ 51
Figure 29: READ OTP Command .................................................................................................................... 54
Figure 30: PROGRAM OTP Command ............................................................................................................ 56
Figure 31: XIP Mode Directly After Power-On .................................................................................................. 58
Figure 32: Power-Up Timing .......................................................................................................................... 60
Figure 33: Reset AC Timing During PROGRAM or ERASE Cycle ........................................................................ 63
Figure 34: Reset Enable ................................................................................................................................. 63
Figure 35: Serial Input Timing ........................................................................................................................ 63
Figure 36: Write Protect Setup and Hold During WRITE STATUS REGISTER Operation (SRWD = 1) ................... 64
Figure 37: Hold Timing .................................................................................................................................. 65
Figure 38: Output Timing .............................................................................................................................. 66
Figure 39: V_PPH Timing .................................................................................................................................. 66
Figure 40: AC Timing Input/Output Reference Levels ...................................................................................... 68
Figure 41: V-PDFN-8 6mm x 5mm Sawn (MLP8) – Package Code: F7 ................................................................ 72
Figure 42: V-PDFN-8 8mm x 6mm (MLP8) – Package Code: F8 ........................................................................ 73
Figure 43: T-PBGA-24b05 6mm x 8mm – Package Code: 12 .............................................................................. 74
Figure 44: T-PBGA-24b05 6mm x 8mm – Package Code: 14 .............................................................................. 75
Figure 45: SOP2-16 (300 mils body width) – Package Code: SF ......................................................................... 76
Figure 46: SOP2-8 (208 mils body width) – Package Code: SE ........................................................................... 77
PDF: 09005aef845665fe
n25q_128mb_3v_65nm.pdf - Rev. P 06/13 EN
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