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N25Q128A13ESE40G Datasheet, PDF (34/81 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q128A
128Mb, 3V, Multiple I/O Serial Flash Memory
READ IDENTIFICATION Operations
READ IDENTIFICATION Operations
READ ID and MULTIPLE I/O READ ID Commands
To execute the READ ID or MULTIPLE I/O READ ID commands, S# is driven LOW and
the command code is input on DQn. The device outputs the information shown in the
tables below. If an ERASE or PROGRAM cycle is in progress when the command is exe-
cuted, the command is not decoded and the command cycle in progress is not affected.
When S# is driven HIGH, the device goes to standby. The operation is terminated by
driving S# HIGH at any time during data output.
Table 18: Data/Address Lines for READ ID and MULTIPLE I/O READ ID Commands
Command Name
READ ID
MULTIPLE I/O READ ID
Data In
DQ0
DQ[3:0]
Data Out
DQ0
DQ[1:0]
Unique ID
is Output
Yes
No
Extended
Yes
No
Dual
No
Yes
Quad
No
Yes
Note: 1. Yes in the protocol columns indicates that the command is supported and has the same
functionality and command sequence as other commands marked Yes.
Table 19: Read ID Data Out
Size
(Bytes)
1
2
17
Name
Manufacturer ID
Device ID
Memory Type
Memory Capacity
Unique ID
1 Byte: Length of data to follow
2 Bytes: Extended device ID and device
configuration information
14 Bytes: Customized factory data
Content Value
20h
BAh
18h (128Mb)
10h
ID and information such as uniform
architecture, and HOLD
or RESET functionality
Unique ID code (n read-only bytes)
Assigned by
JEDEC
Manufacturer
Factory
Note: 1. The 17 bytes of information in the unique ID is read by the READ ID command, but can-
not be read by the MULTIPLE I/O READ ID command.
Table 20: Extended Device ID, First Byte
Bit 7
Reserved
Bit 6
Reserved
Bit 5
1 = Reserved
0 = Standard BP
scheme
Bit 4
Volatile configuration
register, XIP bit setting:
0 = Required
1 = Not required
Bit 3
HOLD#/RESET#:
0 = HOLD
1 = RESET
Bit 2
Addressing:
0 = by byte
Bit 1 Bit 0
Architecture:
00 = Uniform
PDF: 09005aef845665fe
n25q_128mb_3v_65nm.pdf - Rev. P 06/13 EN
34
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