N25Q128A13ESE40G Datasheet, PDF(27/81 Page) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q128A

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N25Q128A13ESE40G Datasheet, PDF (27/81 Pages) Micron Technology – Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q128A

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128Mb, 3V, Multiple I/O Serial Flash Memory

Command Definitions

Table 16: Command Set (Continued)

Note 1 applies to entire table

Command

Code

READ ENHANCED VOLATILE

65h

CONFIGURATION REGISTER

WRITE ENHANCED VOLATILE

61h

CONFIGURATION REGISTER

PROGRAM Operations

PAGE PROGRAM

02h

DUAL INPUT FAST PROGRAM

A2h

EXTENDED DUAL INPUT

02h

FAST PROGRAM

A2h

D2h

QUAD INPUT FAST PROGRAM

32h

EXTENDED QUAD INPUT

02h

FAST PROGRAM

32h

12h

ERASE Operations

SUBSECTOR ERASE

20h

SECTOR ERASE

D8h

BULK ERASE

C7h

PROGRAM/ERASE RESUME

7Ah

PROGRAM/ERASE SUSPEND

75h

ONE-TIME PROGRAMMABLE (OTP) Operations

READ OTP ARRAY

4Bh

PROGRAM OTP ARRAY

42h

Extended

Yes

Dual

I/O

Yes

Quad

I/O

Yes

Data

Bytes

1 to â

Notes

2, 8

Yes

1 to 256

4, 8

1 to 256

4, 8

4, 6, 8

Yes

1 to 256

4, 8

Yes

4, 7, 8

Yes

4, 8

2, 8

Yes

2, 8

Yes

1 to 64

Notes:

1. Yes in the protocol columns indicates that the command is supported and has the same

functionality and command sequence as other commands marked Yes.

2. Address bytes = 0. Dummy clock cycles = 0.

3. Address bytes = 3. Dummy clock cycles default = 8.

4. Address bytes default = 3. Dummy clock cycles = 0.

5. Address bytes default = 3. Dummy clock cycles default = 8. Dummy clock cycles default =

10 (when quad SPI protocol is enabled). Dummy clock cycles is configurable by the user.

6. When the device is in dual SPI protocol, the command can be entered with any of these

three codes. The different codes enable compatibility between dual SPI and extended

SPI protocols.

7. When the device is in quad SPI protocol, the command can be entered with any of these

three codes. The different codes enable compatibility between quad SPI and extended

SPI protocols.

8. The WRITE ENABLE command must be issued first before this command can be execu-

ted.

PDF: 09005aef845665fe

n25q_128mb_3v_65nm.pdf - Rev. P 06/13 EN

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