PIC24HJ12GP201 Datasheet, PDF (96/234 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJ12GP201/202
9.4.3.3 Mapping
The control schema of peripheral select pins is not lim-
ited to a small range of fixed peripheral configurations.
There are no mutual or hardware-enforced lockouts
between any of the peripheral mapping SFRs. Literally
any combination of peripheral mappings across any or
all of the RPn pins is possible. This includes both
many-to-one and one-to-many mappings of peripheral
inputs and outputs to pins.
While such mappings may be technically possible from
a configuration point of view, they may not be
supportable electrically.
9.4.4
CONTROLLING CONFIGURATION
CHANGES
Because peripheral remapping can be changed during
run time, some restrictions on peripheral remapping
are needed to prevent accidental configuration
changes. PIC24H devices include three features to
prevent alterations to the peripheral map:
• Control register lock sequence
• Continuous state monitoring
• Configuration bit pin select lock
9.4.4.1 Control Register Lock
Under normal operation, writes to the RPINRx and
RPORx registers are not allowed. Attempted writes
appear to execute normally, but the contents of the
registers remain unchanged. To change these
registers, they must be unlocked in hardware. The
register lock is controlled by the IOLOCK bit
(OSCCON<6>). Setting IOLOCK prevents writes to
the control registers; clearing IOLOCK allows writes.
To set or clear IOLOCK, a specific command sequence
must be executed:
1. Write 0x46 to OSCCON<7:0>.
2. Write 0x57 to OSCCON<7:0>.
3. Clear (or set) IOLOCK as a single operation.
Note:
MPLAB^® C30 provides built-in C language
functions for unlocking the OSCCON
register:
__builtin_write_OSCCONL(value)
__builtin_write_OSCCONH(value)
See MPLAB IDE Help for more
information.
Unlike the similar sequence with the oscillator’s LOCK
bit, IOLOCK remains in one state until changed. This
allows all of the peripheral pin selects to be configured
with a single unlock sequence followed by an update to
all control registers, then locked with a second lock
sequence.
9.4.4.2 Continuous State Monitoring
In addition to being protected from direct writes, the
contents of the RPINRx and RPORx registers are
constantly monitored in hardware by shadow registers.
If an unexpected change in any of the registers occurs
(such as cell disturbances caused by ESD or other
external events), a configuration mismatch Reset will
be triggered.
9.4.4.3 Configuration Bit Pin Select Lock
As an additional level of safety, the device can be
configured to prevent more than one write session to
the RPINRx and RPORx registers. The IOL1WAY
(FOSC<IOL1WAY>) configuration bit blocks the
IOLOCK bit from being cleared after it has been set
once.
In the default (unprogrammed) state, IOL1WAY is set,
restricting users to one write session. Programming
IOL1WAY allows user applications unlimited access
(with the proper use of the unlock sequence) to the
peripheral pin select registers.
9.4.5
CONSIDERATIONS FOR
PERIPHERAL PIN SELECTION
The ability to control peripheral pin selection
introduces several considerations into application
design, including several common peripherals that are
only available as remappable peripherals.
9.4.5.1 Configuration
The peripheral pin selects are not available on default
pins in the device’s default (Reset) state. More
specifically, since all RPINRx and RPORx registers
reset to 0000h, this means all peripheral pin select
inputs are tied to RP0, while all peripheral pin select
outputs are disconnected. This means that before any
other application code is executed, the user application
must initialize the device with the proper peripheral
configuration.
Since the IOLOCK bit resets in the unlocked state, it is
not necessary to execute the unlock sequence after
the device has come out of Reset. For the sake of
application safety, however, it is always a good idea to
set IOLOCK and lock the configuration after writing to
the control registers.
Because the unlock sequence is timing critical, it must
be executed as an assembly language routine, in the
same manner as changes to the oscillator
configuration. If the bulk of the application is written in
C or another high-level language, the unlock sequence
should be performed by writing inline assembly.
DS70282B-page 94
Preliminary
© 2007 Microchip Technology Inc.