PIC24HJ12GP201 Datasheet, PDF (228/234 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJ12GP201/202
Slave Address Masking ............................................ 135
Slope Control ............................................................ 136
Software Controlled Clock Stretching
(STREN = 1) ..................................................... 135
I²C Module
I2C1 Register Map ...................................................... 25
In-Circuit Debugger ........................................................... 169
In-Circuit Emulation........................................................... 163
In-Circuit Serial Programming (ICSP) ....................... 163, 169
Infrared Support
Built-in IrDA Encoder and Decoder ........................... 145
External IrDA, IrDA Clock Output.............................. 145
Input Capture .................................................................... 117
Registers ................................................................... 118
Input Change Notification.................................................... 90
Instruction Addressing Modes............................................. 31
File Register Instructions ............................................ 31
Fundamental Modes Supported.................................. 32
MCU Instructions ........................................................ 31
Move and Accumulator Instructions ............................ 32
Other Instructions........................................................ 32
Instruction Set
Overview ................................................................... 174
Summary................................................................... 171
Instruction-Based Power-Saving Modes ............................. 87
Idle .............................................................................. 88
Sleep ........................................................................... 87
Interfacing Program and Data Memory Spaces .................. 33
Internal RC Oscillator
Use with WDT ........................................................... 167
Internet Address................................................................ 228
Interrupt Control and Status Registers................................ 53
IECx ............................................................................ 53
IFSx............................................................................. 53
INTCON1 .................................................................... 53
INTCON2 .................................................................... 53
IPCx ............................................................................ 53
Interrupt Setup Procedures ................................................. 75
Initialization ................................................................. 75
Interrupt Disable.......................................................... 75
Interrupt Service Routine ............................................ 75
Trap Service Routine .................................................. 75
Interrupt Vector Table (IVT) ................................................ 49
Interrupts Coincident with Power Save Instructions............ 88
J
JTAG Boundary Scan Interface ........................................ 163
JTAG Interface .................................................................. 168
M
Memory Organization.......................................................... 17
Microchip Internet Web Site .............................................. 228
MPLAB ASM30 Assembler, Linker, Librarian ................... 180
MPLAB ICD 2 In-Circuit Debugger.................................... 181
MPLAB ICE 2000 High-Performance Universal
In-Circuit Emulator .................................................... 181
MPLAB Integrated Development Environment Software .. 179
MPLAB PM3 Device Programmer..................................... 181
MPLAB REAL ICE In-Circuit Emulator System................. 181
MPLINK Object Linker/MPLIB Object Librarian ................ 180
Multi-Bit Data Shifter ........................................................... 16
N
NVM Module
Register Map .............................................................. 30
O
Open-Drain Configuration................................................... 90
Oscillator Configuration ...................................................... 77
Output Compare ............................................................... 119
Registers .................................................................. 123
P
Packaging ......................................................................... 217
Details....................................................................... 218
Marking ..................................................................... 217
Peripheral Module Disable (PMD) ...................................... 88
Peripheral Pin Select Module
Input Register Map ..................................................... 26
Output Register Map for PIC24HJ12GP202............... 26
PICSTART Plus Development Programmer..................... 182
Pinout I/O Descriptions (table).............................................. 9
PMD Module
Register Map .............................................................. 30
POR and Long Oscillator Start-up Times ........................... 47
PORTA
Register Map .............................................................. 29
PORTB
Register Map for PIC24HJ12GP201........................... 29
Register Map for PIC24HJ12GP202........................... 29
Power-Saving Features ...................................................... 87
Clock Frequency and Switching ................................. 87
Program Address Space..................................................... 17
Construction ............................................................... 33
Data Access from Program Memory Using
Program Space Visibility..................................... 36
Data Access from Program Memory Using Table
Instructions ......................................................... 35
Data Access from, Address Generation ..................... 34
Memory Map for PIC24HJ12GP201/202 .................... 17
Table Read Instructions
TBLRDH ............................................................. 35
TBLRDL.............................................................. 35
Visibility Operation ...................................................... 36
Program Memory
Interrupt Vector ........................................................... 18
Organization ............................................................... 18
Reset Vector ............................................................... 18
Pulse-Width Modulation Mode.......................................... 120
PWM
Duty Cycle ................................................................ 120
Period ....................................................................... 120
R
Reader Response............................................................. 229
Registers
AD1CHS0 (ADC1 Input Channel 0 Select ................ 160
AD1CHS123 (ADC1 Input Channel 1, 2, 3
Select) .............................................................. 158
AD1CON1 (ADC1 Control 1) .................................... 154
AD1CON2 (ADC1 Control 2) .................................... 156
AD1CON3 (ADC1 Control 3) .................................... 157
AD1CSSL (ADC1 Input Scan Select Low)................ 161
AD1PCFGL (ADC1 Port Configuration Low) ............ 161
CLKDIV (Clock Divisor) .............................................. 82
CORCON (Core Control) ...................................... 15, 55
I2CxCON (I2Cx Control) ........................................... 137
DS70282B-page 226
Preliminary
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