PIC24HJ12GP201 Datasheet, PDF (229/234 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJ12GP201/202
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 141
I2CxSTAT (I2Cx Status) ........................................... 139
ICxCON (Input Capture x Control) ............................ 118
IEC0 (Interrupt Enable Control 0) ............................... 62
IEC1 (Interrupt Enable Control 0) ............................... 64
IEC4 (Interrupt Enable Control 0) ............................... 65
IFS0 (Interrupt Flag Status 0) ..................................... 58
IFS1 (Interrupt Flag Status 1) ..................................... 60
IFS4 (Interrupt Flag Status 4) ..................................... 61
INTCON1 (Interrupt Control 1).................................... 56
INTCON2 (Interrupt Control 2).................................... 57
INTTREG Interrupt Control and Status Register......... 74
IPC0 (Interrupt Priority Control 0) ............................... 66
IPC1 (Interrupt Priority Control 1) ............................... 67
IPC16 (Interrupt Priority Control 16) ........................... 73
IPC2 (Interrupt Priority Control 2) ............................... 68
IPC3 (Interrupt Priority Control 3) ............................... 69
IPC4 (Interrupt Priority Control 4) ............................... 70
IPC5 (Interrupt Priority Control 5) ............................... 71
IPC7 (Interrupt Priority Control 7) ............................... 72
NVMCON (Flash Memory Control) ............................. 39
NVMKEY (Nonvolatile Memory Key) .......................... 40
OCxCON (Output Compare x Control) ..................... 123
OSCCON (Oscillator Control) ..................................... 80
OSCTUN (FRC Oscillator Tuning) .............................. 84
PLLFBD (PLL Feedback Divisor)................................ 83
RCON (Reset Control) ................................................ 44
SPIxCON1 (SPIx Control 1)...................................... 130
SPIxCON2 (SPIx Control 2)...................................... 132
SPIxSTAT (SPIx Status and Control) ....................... 129
SR (CPU Status)................................................... 14, 54
T1CON (Timer1 Control)........................................... 110
T2CON Control ......................................................... 114
T3CON Control ......................................................... 115
UxMODE (UARTx Mode).......................................... 146
UxSTA (UARTx Status and Control)......................... 148
Reset
Clock Source Selection............................................... 46
Special Function Register Reset States ..................... 47
Times .......................................................................... 46
Reset Sequence ................................................................. 49
Resets ................................................................................. 43
S
Serial Peripheral Interface (SPI) ....................................... 125
Setup for Continuous Output Pulse Generation................ 119
Setup for Single Output Pulse Generation ........................ 119
Software Simulator (MPLAB SIM)..................................... 180
Software Stack Pointer, Frame Pointer
CALL Stack Frame...................................................... 31
Special Features of the CPU ............................................ 163
Special MCU Features ........................................................ 11
SPI
Master, Frame Master Connection ........................... 127
Master/Slave Connection.......................................... 127
Slave, Frame Master Connection ............................. 128
Slave, Frame Slave Connection ............................... 128
SPI Module
SPI1 Register Map...................................................... 25
Symbols Used in Opcode Descriptions............................. 172
System Control
Register Map............................................................... 29
T
Temperature and Voltage Specifications
AC............................................................................. 192
Timer1 .............................................................................. 109
Timer2/3 ........................................................................... 111
Timing Characteristics
CLKO and I/O ........................................................... 195
Timing Diagrams
10-bit A/D Conversion .............................................. 215
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0,
ASAM = 0, SSRC = 000) .................................. 215
12-bit A/D Conversion (ASAM = 0, SSRC = 000)..... 214
External Clock .......................................................... 193
I2Cx Bus Data (Master Mode) .................................. 207
I2Cx Bus Data (Slave Mode) .................................... 209
I2Cx Bus Start/Stop Bits (Master Mode)................... 207
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 209
Input Capture (CAPx) ............................................... 200
OC/PWM .................................................................. 201
Output Compare (OCx) ............................................ 200
Reset, Watchdog Timer, Oscillator Start-up
Timer and Power-up Timer............................... 196
SPIx Master Mode (CKE = 0) ................................... 202
SPIx Master Mode (CKE = 1) ................................... 203
SPIx Slave Mode (CKE = 0) ..................................... 204
SPIx Slave Mode (CKE = 1) ..................................... 205
Timer1, 2 and 3 External Clock ................................ 198
Timing Requirements
CLKO and I/O ........................................................... 195
DCI AC-Link Mode.................................................... 211
DCI Multi-Channel, I²S Modes ................................. 211
External Clock .......................................................... 193
Input Capture............................................................ 200
Timing Specifications
10-bit A/D Conversion Requirements ....................... 216
12-bit A/D Conversion Requirements ....................... 214
I2Cx Bus Data Requirements (Master Mode)........... 208
I2Cx Bus Data Requirements (Slave Mode)............. 210
Output Compare Requirements................................ 200
PLL Clock ................................................................. 194
Reset, Watchdog Timer, Oscillator Start-up Timer,
Power-up Timer and Brown-out Reset
Requirements ................................................... 197
Simple OC/PWM Mode Requirements ..................... 201
SPIx Master Mode (CKE = 0) Requirements............ 202
SPIx Master Mode (CKE = 1) Requirements............ 203
SPIx Slave Mode (CKE = 0) Requirements.............. 204
SPIx Slave Mode (CKE = 1) Requirements.............. 206
Timer1 External Clock Requirements ....................... 198
Timer2 External Clock Requirements ....................... 199
Timer3 External Clock Requirements ....................... 199
U
UART
Baud Rate Generator (BRG) .................................... 144
Break and Sync Transmit Sequence ........................ 145
Flow Control Using UxCTS and UxRTS Pins ........... 145
Receiving in 8-bit or 9-bit Data Mode ....................... 145
Transmitting in 8-bit Data Mode ............................... 145
Transmitting in 9-bit Data Mode ............................... 145
UART Module
UART1 Register Map ................................................. 25
Universal Asynchronous Receiver Transmitter (UART) ... 143
© 2007 Microchip Technology Inc.
Preliminary
DS70282B-page 227