PIC24HJ12GP201 Datasheet, PDF (176/234 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

PIC24HJ12GP201/202
TABLE 19-2: INSTRUCTION SET OVERVIEW
Base
Instr
#
Assembly
Mnemonic
Assembly Syntax
Description
1
ADD
2
ADDC
3
AND
4
ASR
5
BCLR
6
BRA
7
BSET
8
BSW
9
BTG
10
BTSC
ADD
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC
ADDC
AND
AND
AND
AND
AND
ASR
ASR
ASR
ASR
ASR
BCLR
BCLR
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BSET
BSET
BSW.C
BSW.Z
BTG
BTG
BTSC
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
f,#bit4
Ws,#bit4
C,Expr
GE,Expr
GEU,Expr
GT,Expr
GTU,Expr
LE,Expr
LEU,Expr
LT,Expr
LTU,Expr
N,Expr
NC,Expr
NN,Expr
NZ,Expr
Expr
Z,Expr
Wn
f,#bit4
Ws,#bit4
Ws,Wb
Ws,Wb
f,#bit4
Ws,#bit4
f,#bit4
f = f + WREG
WREG = f + WREG
Wd = lit10 + Wd
Wd = Wb + Ws
Wd = Wb + lit5
f = f + WREG + (C)
WREG = f + WREG + (C)
Wd = lit10 + Wd + (C)
Wd = Wb + Ws + (C)
Wd = Wb + lit5 + (C)
f = f .AND. WREG
WREG = f .AND. WREG
Wd = lit10 .AND. Wd
Wd = Wb .AND. Ws
Wd = Wb .AND. lit5
f = Arithmetic Right Shift f
WREG = Arithmetic Right Shift f
Wd = Arithmetic Right Shift Ws
Wnd = Arithmetic Right Shift Wb by Wns
Wnd = Arithmetic Right Shift Wb by lit5
Bit Clear f
Bit Clear Ws
Branch if Carry
Branch if greater than or equal
Branch if unsigned greater than or equal
Branch if greater than
Branch if unsigned greater than
Branch if less than or equal
Branch if unsigned less than or equal
Branch if less than
Branch if unsigned less than
Branch if Negative
Branch if Not Carry
Branch if Not Negative
Branch if Not Zero
Branch Unconditionally
Branch if Zero
Computed Branch
Bit Set f
Bit Set Ws
Write C bit to Ws<Wb>
Write Z bit to Ws<Wb>
Bit Toggle f
Bit Toggle Ws
Bit Test f, Skip if Clear
BTSC
Ws,#bit4
Bit Test Ws, Skip if Clear
11
BTSS
BTSS
f,#bit4
Bit Test f, Skip if Set
BTSS
Ws,#bit4
Bit Test Ws, Skip if Set
# of # of Status Flags
Words Cycles Affected
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
C,DC,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
N,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
C,N,OV,Z
1
1
N,Z
1
1
N,Z
1
1
None
1
1
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
1 (2)
None
1
2
None
1
1 (2)
None
1
2
None
1
1
None
1
1
None
1
1
None
1
1
None
1
1
None
1
1
None
1
1
(2 or 3)
None
1
1
(2 or 3)
None
1
1
(2 or 3)
None
1
1
(2 or 3)
None
DS70282B-page 174
Preliminary
© 2007 Microchip Technology Inc.