PIC24HJ12GP201 Datasheet, PDF (31/234 Pages) Microchip Technology – High-Performance, 16-Bit Microcontrollers

TABLE 3-16: PORTA REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8 Bit 7
TRISA
PORTA
LATA
ODCA
Legend:
02C0
—
—
—
—
—
—
—
—
—
02C2
—
—
—
—
—
—
—
—
—
02C4
—
—
—
—
—
—
—
—
—
02C6
—
—
—
—
—
—
—
—
—
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 6
—
—
—
—
Bit 5
—
—
—
—
Bit 4
TRISA4
RA4
LATA4
ODCA4
Bit 3
Bit 2
TRISA3
RA3
LATA3
ODCA3
TRISA2
RA2
LATA2
ODCA2
Bit 1
TRISA1
RA1
LATA1
ODCA1
Bit 0
All
Resets
TRISA0
RA0
LATA0
ODCA0
001F
xxxx
xxxx
xxxx
TABLE 3-17: PORTB REGISTER MAP FOR PIC24HJ12GP202
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
TRISB
PORTB
LATB
ODCB
Legend:
02C8 TRISB15 TRISB14 TRISB13 TRISB12 TRISB11 TRISB10 TRISB9 TRISB8 TRISB7
02CA RB15
RB14
RB13
RB12
RB11
RB10
RB9
RB8
RB7
02CC LATB15 LATB14 LATB13 LATB12 LATB11 LATB10 LATB9 LATB8 LATB7
02CE ODCB15 ODCB14 ODCB13 ODCB12 ODCB11 ODCB10 ODCB9 ODCB8 ODCB7
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 6
TRISB6
RB6
LATB6
ODCB6
Bit 5
Bit 4
TRISB5
RB5
LATB5
ODCB5
TRISB4
RB4
LATB4
ODCB4
Bit 3
Bit 2
Bit 1
Bit 0
TRISB3
RB3
LATB3
ODCB3
TRISB2
RB2
LATB2
ODCB2
TRISB1
RB1
LATB1
ODCB1
TRISB0
RB0
LATB0
ODCB0
All
Resets
FFFF
xxxx
xxxx
xxxx
TABLE 3-18: PORTB REGISTER MAP FOR PIC24HJ12GP201
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
TRISB
PORTB
LATB
ODCB
Legend:
02C8 TRISB15 TRISB14 —
—
—
—
TRISB9 TRISB8 TRISB7
02CA RB15 RB14
—
—
—
—
RB9
RB8
RB7
02CC LATB15 LATB14
—
—
—
—
LATB9 LATB8 LATB7
02CE ODCB15 ODCB14 —
—
—
—
ODCB9 ODCB8 ODCB7
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 6
—
—
—
—
Bit 5
Bit 4
Bit 3
—
TRISB4
—
—
RB4
—
—
LATB4
—
—
ODCB4
—
Bit 2
—
—
—
—
Bit 1
Bit 0
All
Resets
TRISB1 TRISB0
RB1
RB0
LATB1 LATB0
ODCB1 ODCB0
C393
xxxx
xxxx
xxxx
TABLE 3-19: SYSTEM CONTROL REGISTER MAP
File Name Addr Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
RCON
OSCCON
CLKDIV
PLLFBD
OSCTUN
Legend:
Note 1:
2:
0740 TRAPR IOPUWR —
—
—
—
CM VREGS EXTR
SWR SWDTEN WDTO SLEEP IDLE
BOR
POR
0742
—
COSC<2:0>
—
NOSC<2:0>
CLKLOCK IOLOCK LOCK
—
CF
— LPOSCEN OSWEN
0744
ROI
DOZE<2:0>
DOZEN
FRCDIV<2:0>
PLLPOST<1:0>
—
PLLPRE<4:0>
0746
—
—
—
—
—
—
—
PLLDIV<8:0>
0748
—
—
—
—
—
—
—
—
—
—
TUN<5:0>
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
RCON register Reset values dependent on type of Reset.
OSCCON register Reset values dependent on the FOSC Configuration bits and by type of Reset.
xxxx⁽¹⁾
0300⁽²⁾
0040
0030
0000