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PIC32MX320F032H_11 Datasheet, PDF (77/214 Pages) Microchip Technology – High-Performance, General Purpose and USB, 32-bit Flash Microcontrollers
TABLE 4-35: CHANGE NOTICE AND PULL-UP REGISTERS MAP FOR PIC32MX320F128L, PIC32MX340F128L, PIC32MX360F256L,
PIC32MX360F512L, PIC32MX440F128L, PIC32MX460F256L AND PIC32MX460F512L DEVICES ONLY(1)
Bits
31/15 30/14 29/13 28/12 27/11 26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
61C0 CNCON
15:0 ON
—
SIDL
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
61D0
31:16 —
—
—
—
—
—
CNEN
15:0 CNEN15 CNEN14 CNEN13 CNEN12 CNEN11 CNEN10
—
CNEN9
—
CNEN8
—
CNEN7
—
CNEN6
CNEN21 CNEN20 CNEN19 CNEN18 CNEN17 CNEN16 0000
CNEN5 CNEN4 CNEN3 CNEN2 CNEN1 CNEN0 0000
31:16 —
—
—
—
—
—
—
—
—
—
CNPUE21 CNPUE20 CNPUE19 CNPUE18 CNPUE17 CNPUE16 0000
61E0 CNPUE
15:0 CNPUE15 CNPUE14 CNPUE13 CNPUE12 CNPUE11 CNPUE10 CNPUE9 CNPUE8 CNPUE7 CNPUE6 CNPUE5 CNPUE4 CNPUE3 CNPUE2 CNPUE1 CNPUE1 0000
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.
TABLE 4-36:
CHANGE NOTICE AND PULL-UP REGISTERS MAP FOR PIC32MX320F032H, PIC32MX320F064H, PIC32MX320F128H,
PIC32MX340F128H, PIC32MX340F256H, PIC32MX340F512H, PIC32MX420F032H, PIC32MX440F128H, PIC32MX440F256H
AND PIC32MX440F512H DEVICES ONLY(1)
Bits
31/15 30/14 29/13 28/12 27/11 26/10
25/9
24/8
23/7
22/6
21/5
20/4
19/3
18/2
17/1
16/0
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
61C0 CNCON
15:0 ON
—
SIDL
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
61D0
31:16 —
—
—
—
—
—
CNEN
15:0 CNEN15 CNEN14 CNEN13 CNEN12 CNEN11 CNEN10
—
CNEN9
—
CNEN8
—
CNEN7
—
CNEN6
—
CNEN5
—
CNEN4
—
CNEN3
CNEN18 CNEN17 CNEN16 0000
CNEN2 CNEN1 CNEN0 0000
31:16 —
—
—
—
—
—
—
—
—
—
—
—
—
CNPUE18 CNPUE17 CNPUE16 0000
61E0 CNPUE
15:0 CNPUE15 CNPUE14 CNPUE13 CNPUE12 CNPUE11 CNPUE10 CNPUE9 CNPUE8 CNPUE7 CNPUE6 CNPUE5 CNPUE4 CNPUE3 CNPUE2 CNPUE1 CNPUE1 0000
Legend:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Note 1:
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more
information.