PIC32MX320F032H_11 Datasheet, PDF (178/214 Pages) Microchip Technology – High-Performance, General Purpose and USB, 32-bit Flash Microcontrollers

PIC32MX3XX/4XX
TABLE 29-33: I2Cx BUS DATA TIMING REQUIREMENTS (SLAVE MODE)
Standard Operating Conditions: 2.3V to 3.6V
AC CHARACTERISTICS
(unless otherwise stated)
Operating temperature -40°C ≤TA ≤+85°C for Industrial
-40°C ≤TA ≤+105°C for V-Temp
Param.
No.
Symbol
Characteristics
Min.
Max. Units
Conditions
IS10 TLO:SCL Clock Low Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
1 MHz mode⁽¹⁾
0.5
IS11 THI:SCL Clock High Time 100 kHz mode
4.0
—
μs
—
μs
—
μs
400 kHz mode
0.6
—
μs
1 MHz mode⁽¹⁾
0.5
—
μs
IS20 TF:SCL SDAx and SCLx 100 kHz mode
—
300 ns
Fall Time
400 kHz mode 20 + 0.1 CB 300 ns
1 MHz mode⁽¹⁾
—
100 ns
IS21
TR:SCL SDAx and SCLx 100 kHz mode
—
1000 ns
Rise Time
400 kHz mode 20 + 0.1 CB 300 ns
1 MHz mode⁽¹⁾
—
300 ns
IS25 TSU:DAT Data Input
100 kHz mode
250
Setup Time
400 kHz mode
100
1 MHz mode⁽¹⁾
100
—
ns
—
ns
—
ns
IS26 THD:DAT Data Input
100 kHz mode
0
—
ns
Hold Time
400 kHz mode
0
0.9 μs
1 MHz mode⁽¹⁾
0
0.3 μs
IS30
TSU:STA Start Condition
Setup Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4700
600
250
—
ns
—
ns
—
ns
IS31
THD:STA Start Condition
Hold Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4000
600
250
—
ns
—
ns
—
ns
IS33
TSU:STO Stop Condition
Setup Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4000
600
600
—
ns
—
ns
—
ns
IS34
THD:STO Stop Condition
Hold Time
100 kHz mode
400 kHz mode
1 MHz mode⁽¹⁾
4000
600
250
—
ns
—
ns
ns
IS40
TAA:SCL
Output Valid from 100 kHz mode
Clock
400 kHz mode
1 MHz mode⁽¹⁾
0
3500 ns
0
1000 ns
0
350 ns
IS45 TBF:SDA Bus Free Time 100 kHz mode
4.7
—
μs
400 kHz mode
1.3
1 MHz mode⁽¹⁾
0.5
—
μs
—
μs
IS50 CB
Bus Capacitive Loading
—
400 pF
Note 1: Maximum pin capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only).
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz.
—
PBCLK must operate at a
minimum of 800 KHz.
PBCLK must operate at a
minimum of 3.2 MHz.
—
CB is specified to be from
10 to 400 pF.
CB is specified to be from
10 to 400 pF.
—
—
Only relevant for Repeated
Start condition.
After this period, the first
clock pulse is generated.
—
—
—
The amount of time the bus
must be free before a new
transmission can start.
—
DS61143H-page 178
© 2011 Microchip Technology Inc.