PIC32MX320F032H_11 Datasheet, PDF(55/214 Page) Microchip Technology – High-Performance, General Purpose and USB, 32-bit Flash Microcontrollers

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PIC32MX320F032H_11 Datasheet, PDF (55/214 Pages) Microchip Technology – High-Performance, General Purpose and USB, 32-bit Flash Microcontrollers

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TABLE 4-6:

INTERRUPT REGISTERS MAP FOR THE PIC32MX420F032H DEVICE ONLY(1)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

31:16 â

SS0 0000

1000 INTCON

15:0

MVEC

TPC<2:0>

INT4EP INT3EP INT2EP INT1EP INT0EP 0000

1010 INTSTAT(2) 31:16

â 0000

15:0

SRIPL<2:0>

VEC<5:0>

0000

31:16

1020 IPTMR

15:0

IPTMR<31:0>

0000

1030

IFS0

31:16 I2C1MIF I2C1SIF

15:0 INT3IF OC3IF

I2C1BIF

IC3IF

U1TXIF

T3IF

U1RXIF

INT2IF

U1EIF

OC2IF

IC2IF

T2IF

INT1IF

OC5IF

OC1IF

IC5IF

IC1IF

T5IF

T1IF

INT4IF

INT0IF

OC4IF

CS1IF

IC4IF

CS0IF

T4IF

CTIF

0000

1040

IFS1

31:16 â

15:0 RTCCIF FSCMIF I2C2MIF I2C2SIF

I2C2BIF

U2TXIF

USBIF

U2RXIF

FCEIF

U2EIF

SPI2RXIF SPI2TXIF SPI2EIF

CMP2IF

CMP1IF

PMPIF

AD1IF

CNIF

0000

1060

IEC0

31:16 I2C1MIE I2C1SIE

15:0 INT3IE OC3IE

I2C1BIE

IC3IE

U1TXIE

T3IE

U1RXIE

INT2IE

U1EIE

OC2IE

IC2IE

T2IE

INT1IE

OC5IE

OC1IE

IC5IE

IC1IE

T5IE

T1IE

INT4IE

INT0IE

OC4IE

CS1IE

IC4IE

CS0IE

T4IE

CTIE

0000

1070

IEC1

31:16 â

15:0 RTCCIE FSCMIE I2C2MIE I2C2SIE I2C2BIE

U2TXIE

USBIE

U2RXIE

FCEIE

U2EIE SPI2RXIE SPI2TXIE SPI2EIE CMP2IE CMP1IE

PMPIE

AD1IE

â 0000

CNIE 0000

31:16 â

1090 IPC0

15:0

INT0IP<2:0>

CS0IP<2:0>

INT0IS<1:0>

CS0IS<1:0>

CS1IP<2:0>

CTIP<2:0>

CS1IS<1:0>

CTIS<1:0>

0000

31:16 â

10A0 IPC1

15:0

INT1IP<2:0>

IC1IP<2:0>

INT1IS<1:0>

IC1IS<1:0>

OC1IP<2:0>

T1IP<2:0>

OC1IS<1:0>

T1IS<1:0>

0000

31:16 â

10B0 IPC2

15:0

INT2IP<2:0>

IC2IP<2:0>

INT2IS<1:0>

IC2IS<1:0>

OC2IP<2:0>

T2IP<2:0>

OC2IS<1:0>

T2IS<1:0>

0000

31:16 â

10C0 IPC3

15:0

INT3IP<2:0>

IC3IP<2:0>

INT3IS<1:0>

IC3IS<1:0>

OC3IP<2:0>

T3IP<2:0>

OC3IS<1:0>

T3IS<1:0>

0000

31:16 â

10D0 IPC4

15:0

INT4IP<2:0>

IC4IP<2:0>

INT4IS<1:0>

IC4IS<1:0>

OC4IP<2:0>

T4IP<2:0>

OC4IS<1:0>

T4IS<1:0>

0000

31:16 â

10E0 IPC5

15:0

IC5IP<2:0>

IC5IS<1:0>

OC5IP<2:0>

T5IP<2:0>

OC5IS<1:0>

T5IS<1:0>

0000

31:16 â

10F0 IPC6

15:0

AD1IP<2:0>

I2C1IP<2:0>

AD1IS<1:0>

I2C1IS<1:0>

CNIP<2:0>

U1IP<2:0>

CNIS<1:0>

U1IS<1:0>

0000

31:16 â

1100 IPC7

15:0

SPI2IP<2:0>

CMP1IP<2:0>

SPI2IS<1:0>

CMP1IS<1:0>

CMP2IP<2:0>

PMPIP<2:0>

CMP2IS<1:0>

PMPIS<1:0>

0000

31:16 â

1110 IPC8

15:0

RTCCIP<2:0>

I2C2IP<2:0>

RTCCIS<1:0>

I2C2IS<1:0>

FSCMIP<2:0>

U2IP<2:0>

FSCMIS<1:0>

U2IS<1:0>

0000

31:16 â

â 0000

1140 IPC11

15:0

USBIP<2:0>

USBIS<1:0>

FCEIP<2:0>

FCEIS<1:0>

0000

Legend:

x = unknown value on Reset, â = unimplemented, read as â0â. Reset values are shown in hexadecimal.

Note 1: Except where noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 âCLR, SET and INV

Registersâ for more information.

2: This register does not have associated CLR, SET, and INV registers.

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