PIC24FJ256GB110-I Datasheet, PDF (66/328 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB110 FAMILY
TABLE 5-3: RESET DELAY TIMES FOR VARIOUS DEVICE RESETS
Reset Type
Clock Source
SYSRST Delay
System Clock
Delay
FSCM
Delay
Notes
POR
EC, FRC, FRCDIV, LPRC TPOR + TSTARTUP + TRST
—
—
1, 2, 3
ECPLL, FRCPLL
TPOR + TSTARTUP + TRST
TLOCK
TFSCM 1, 2, 3, 5, 6
XT, HS, SOSC
TPOR + TSTARTUP + TRST
TOST
TFSCM 1, 2, 3, 4, 6
XTPLL, HSPLL
TPOR + TSTARTUP + TRST TOST + TLOCK
TFSCM 1, 2, 3, 4, 5, 6
BOR
EC, FRC, FRCDIV, LPRC TSTARTUP + TRST
—
—
2, 3
ECPLL, FRCPLL
TSTARTUP + TRST
TLOCK
TFSCM 2, 3, 5, 6
XT, HS, SOSC
TSTARTUP + TRST
TOST
TFSCM 2, 3, 4, 6
XTPLL, HSPLL
TSTARTUP + TRST
TOST + TLOCK
TFSCM 2, 3, 4, 5, 6
MCLR
Any Clock
TRST
—
—
3
WDT
Any Clock
TRST
—
—
3
Software
Any clock
TRST
—
—
3
Illegal Opcode Any Clock
TRST
—
—
3
Uninitialized W Any Clock
TRST
—
—
3
Trap Conflict Any Clock
TRST
—
—
3
Note 1:
2:
3:
4:
5:
6:
TPOR = Power-on Reset delay (10 μs nominal).
TSTARTUP = TVREG (10 μs nominal) if on-chip regulator is enabled or TPWRT (64 ms nominal) if on-chip
regulator is disabled.
TRST = Internal state Reset time (32 μs nominal).
TOST = Oscillator Start-up Timer. A 10-bit counter counts 1024 oscillator periods before releasing the
oscillator clock to the system.
TLOCK = PLL lock time.
TFSCM = Fail-Safe Clock Monitor delay (100 μs nominal).
DS39897B-page 64
Preliminary
© 2008 Microchip Technology Inc.