PIC24FJ256GB110-I Datasheet, PDF (204/328 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB110 FAMILY
17.4 Device Mode Operation
The following section describes how to perform a com-
mon Device mode task. In Device mode, USB transfers
are performed at the transfer level. The USB module
automatically performs the status phase of the transfer.
17.4.1 ENABLING DEVICE MODE
1. Reset the Ping-Pong Buffer Pointers by setting,
then clearing, the Ping-Pong Buffer Reset bit
PPBRST (U1CON<1>).
2. Disable all interrupts (U1IE and U1EIE = 00h).
3. Clear any existing interrupt flags by writing FFh
to U1IR and U1EIR.
4. Verify that VBUS is present (non OTG devices
only).
5. Enable the USB module by setting the USBEN
bit (U1CON<0>).
6. Set the OTGEN bit (U1OTGCON<2>) to enable
OTG operation.
7. Enable the endpoint zero buffer to receive the
first setup packet by setting the EPRXEN and
EPHSHK bits for Endpoint 0 (U1EP0<3,0> = 1).
8. Power up the USB module by setting the
USBPWR bit (U1PWRC<0>).
9. Enable the D+ pull-up resistor to signal an attach
by setting DPPULUP (U1OTGCON<7>).
17.4.2 RECEIVING AN IN TOKEN IN
DEVICE MODE
1. Attach to a USB host and enumerate as described
in Chapter 9 of the USB 2.0 specification.
2. Create a data buffer, and populate it with the
data to send to the host.
3. In the appropriate (EVEN or ODD) Tx BD for the
desired endpoint:
a) Set up the status register (BDnSTAT) with
the correct data toggle (DATA0/1) value and
the byte count of the data buffer.
b) Set up the address register (BDnADR) with
the starting address of the data buffer.
c) Set the UOWN bit of the status register to
‘1’.
4. When the USB module receives an IN token, it
automatically transmits the data in the buffer.
Upon completion, the module updates the status
register (BDnSTAT) and sets the Transfer
Complete Interrupt Flag, TRNIF (U1IR<3>).
17.4.3 RECEIVING AN OUT TOKEN IN
DEVICE MODE
1. Attach to a USB host and enumerate as described
in Chapter 9 of the USB 2.0 specification.
2. Create a data buffer with the amount of data you
are expecting from the host.
3. In the appropriate (EVEN or ODD) Tx BD for the
desired endpoint:
a) Set up the status register (BDnSTAT) with
the correct data toggle (DATA0/1) value and
the byte count of the data buffer.
b) Set up the address register (BDnADR) with
the starting address of the data buffer.
c) Set the UOWN bit of the status register to
‘1’.
4. When the USB module receives an OUT token,
it automatically receives the data sent by the
host to the buffer. Upon completion, the module
updates the status register (BDnSTAT) and sets
the Transfer Complete Interrupt Flag, TRNIF
(U1IR<3>).
17.5 Host Mode Operation
The following sections describe how to perform common
Host mode tasks. In Host mode, USB transfers are
invoked explicitly by the host software. The host soft-
ware is responsible for the Acknowledge portion of the
transfer. Also, all transfers are performed using the
Endpoint 0 control register (U1EP0) and buffer
descriptors.
17.5.1 ENABLE HOST MODE AND
DISCOVER A CONNECTED DEVICE
1. Enable Host mode by setting U1CON<3>
(HOSTEN). This causes the Host mode control
bits in other USB OTG registers to become
available.
2. Enable the D+ and D- pull-down resistors by set-
ting DPPULDWN and DMPULDWN
(U1OTGCON<5:4>). Disable the D+ and D-
pull-up resistors by clearing DPPULUP and
DMPULUP (U1OTGCON<7:6>).
3. At this point, SOF generation begins with the
SOF counter loaded with 12,000. Eliminate
noise on the USB by clearing the SOFEN bit
(U1CON<0>) to disable Start-Of-Frame packet
generation.
4. Enable the device attached interrupt by setting
ATTACHIE (U1IE<6>).
5. Wait for the device attached interrupt
(U1IR<6> = 1). This is signaled by the USB
device changing the state of D+ or D- from ‘0’
to ‘1’ (SE0 to J state). After it occurs, wait
100 ms for the device power to stabilize.
DS39897B-page 202
Preliminary
© 2008 Microchip Technology Inc.