PIC24FJ256GB110-I Datasheet, PDF (165/328 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)

PIC24FJ256GB110 FAMILY
13.3.1 PWM PERIOD
The PWM period is specified by writing to PRy, the
Timer Period register. The PWM period can be
calculated using Equation 13-1.
EQUATION 13-1: CALCULATING THE PWM
PERIOD⁽¹⁾
PWM Period = [(PRy) + 1] • TCY • (Timer Prescale Value)
where: PWM Frequency = 1/[PWM Period]
Note 1: Based on TCY = TOSC * 2, Doze mode
and PLL are disabled.
Note:
A PRy value of N will produce a PWM
period of N + 1 time base count cycles. For
example, a value of 7 written into the PRy
register will yield a period consisting of
8 time base cycles.
13.3.2 PWM DUTY CYCLE
The PWM duty cycle is specified by writing to the
OCxRS and OCxR registers. The OCxRS and OCxR
registers can be written to at any time, but the duty
cycle value is not latched until a match between PRy
and TMRy occurs (i.e., the period is complete). This
provides a double buffer for the PWM duty cycle and is
essential for glitchless PWM operation.
Some important boundary parameters of the PWM duty
cycle include:
• If OCxR, OCxRS, and PRy are all loaded with
0000h, the OCx pin will remain low (0% duty
cycle).
• ·If OCxRS is greater than PRy, the pin will remain
high (100% duty cycle).
See Example 13-1 for PWM mode timing details.
Table 13-1 and Table 13-2 show example PWM
frequencies and resolutions for a device operating at
4 MIPS and 10 MIPS, respectively.
EQUATION 13-2: CALCULATION FOR MAXIMUM PWM RESOLUTION⁽¹⁾
( ) ^log10
FCY
FPWM • (Timer Prescale Value)
Maximum PWM Resolution (bits) =
bits
log₁₀(2)
Note 1: Based on FCY = FOSC/2, Doze mode and PLL are disabled.
EXAMPLE 13-1: PWM PERIOD AND DUTY CYCLE CALCULATIONS⁽¹⁾
1. Find the Timer Period register value for a desired PWM frequency of 52.08 kHz, where FOSC = 8 MHz with PLL (32 MHz
device clock rate) and a Timer2 prescaler setting of 1:1.
TCY = 2 * TOSC = 62.5 ns
PWM Period = 1/PWM Frequency = 1/52.08 kHz = 19.2 μs
PWM Period = (PR2 + 1) • TCY • (Timer 2 Prescale Value)
19.2 μs
= (PR2 + 1) • 62.5 ns • 1
PR2
= 306
2. Find the maximum resolution of the duty cycle that can be used with a 52.08 kHz frequency and a 32 MHz device clock rate:
PWM Resolution = log₁₀(FCY/FPWM)/log₁₀2) bits
= (log₁₀(16 MHz/52.08 kHz)/log₁₀2) bits
= 8.3 bits
Note 1: Based on TCY = 2 * TOSC; Doze mode and PLL are disabled.
© 2008 Microchip Technology Inc.
Preliminary
DS39897B-page 163