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PIC24FJ256GB110-I Datasheet, PDF (130/328 Pages) Microchip Technology – 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG) | |||
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PIC24FJ256GB110 FAMILY
9.4.6
PERIPHERAL PIN SELECT
REGISTERS
The PIC24FJ256GB110 family of devices implements
a total of 37 registers for remappable peripheral
configuration:
⢠Input Remappable Peripheral Registers (21)
⢠Output Remappable Peripheral Registers (16)
Note:
Input and output register values can only be
changed if IOLOCK (OSCCON<6>) = 0.
See Section 9.4.4.1 âControl Register
Lockâ for a specific command sequence.
REGISTER 9-1: RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
U-0
â
bit 15
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
â
INT1R5
INT1R4
INT1R3
INT1R2
INT1R1
R/W-1
INT1R0
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
â
â
â
â
â
â
â
â
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7-0
Unimplemented: Read as â0â
INT1R5:INT1R0: Assign External Interrupt 1 (INT1) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as â0â
REGISTER 9-2: RPINR1: PERIPHERAL PIN SELECT INPUT REGISTER 1
U-0
â
bit 15
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
â
INT3R5
INT3R4
INT3R3
INT3R2
INT3R1
R/W-1
INT3R0
bit 8
U-0
â
bit 7
U-0
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
â
INT2R5
INT2R4
INT2R3
INT2R2
INT2R1
INT2R0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15-14
bit 13-8
bit 7-6
bit 5-0
Unimplemented: Read as â0â
INT3R5:INT3R0: Assign External Interrupt 3 (INT3) to Corresponding RPn or RPIn Pin bits
Unimplemented: Read as â0â
INT2R5:INT2R0: Assign External Interrupt 2 (INT2) to Corresponding RPn or RPIn Pin bits
DS39897B-page 128
Preliminary
© 2008 Microchip Technology Inc.
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