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| PIC18LF4610T-I Datasheet, PDF (52/376 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers | |||
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PIC18F2X1X/4X1X
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET
Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
IPR2
PIR2
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
11-- 1111
00-- 0000
11-- 1111
00-- 0000
uu-- uuuu
uu-- uuuu(1)
PIE2
2410 2510 2515 2610 4410 4510 4515 4610 00-- 0000
00-- 0000
uu-- uuuu
IPR1
2410 2510 2515 2610 4410 4510 4515 4610 1111 1111
1111 1111
uuuu uuuu
PIR1
2410
2410
2410
2510
2510
2510
2515
2515
2515
2610
2610
2610
4410
4410
4410
4510
4510
4510
4515
4515
4515
4610
4610
4610
-111 1111
0000 0000
-000 0000
-111 1111
0000 0000
-000 0000
-uuu uuuu
uuuu uuuu(1)
-uuu uuuu(1)
PIE1
2410 2510 2515 2610 4410 4510 4515 4610 0000 0000
0000 0000
uuuu uuuu
2410 2510 2515 2610 4410 4510 4515 4610 -000 0000
-000 0000
-uuu uuuu
OSCTUNE 2410 2510 2515 2610 4410 4510 4515 4610 00-0 0000
00-0 0000
uu-u uuuu
TRISE
2410 2510 2515 2610 4410 4510 4515 4610 0000 -111
0000 -111
uuuu -uuu
TRISD
2410 2510 2515 2610 4410 4510 4515 4610 1111 1111
1111 1111
uuuu uuuu
TRISC
2410 2510 2515 2610 4410 4510 4515 4610 1111 1111
1111 1111
uuuu uuuu
TRISB
TRISA(5)
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
1111 1111
1111 1111(5)
1111 1111
1111 1111(5)
uuuu uuuu
uuuu uuuu(5)
LATE
2410 2510 2515 2610 4410 4510 4515 4610 ---- -xxx
---- -uuu
---- -uuu
LATD
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx
uuuu uuuu
uuuu uuuu
LATC
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx
uuuu uuuu
uuuu uuuu
LATB
LATA(5)
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
xxxx xxxx
xxxx xxxx(5)
uuuu uuuu
uuuu uuuu(5)
uuuu uuuu
uuuu uuuu(5)
PORTE
2410 2510 2515 2610 4410 4510 4515 4610 ---- x000
---- x000
---- uuuu
PORTD
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTC
2410 2510 2515 2610 4410 4510 4515 4610 xxxx xxxx
uuuu uuuu
uuuu uuuu
PORTB
PORTA(5)
2410 2510 2515 2610 4410 4510 4515 4610
2410 2510 2515 2610 4410 4510 4515 4610
xxxx xxxx
xx0x 0000(5)
uuuu uuuu
uu0u 0000(5)
uuuu uuuu
uuuu uuuu(5)
Legend:
Note 1:
2:
3:
4:
5:
u = unchanged, x = unknown, - = unimplemented bit, read as â0â, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector
(0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are updated with
the current value of the PC. The STKPTR is modified to point to the next location in the hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not enabled as
PORTA pins, they are disabled and read â0â.
DS39636D-page 54
© 2009 Microchip Technology Inc.
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