PIC18LF4610T-I Datasheet, PDF (363/376 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers

INDEX
A
A/D ................................................................................... 213
A/D Converter Interrupt, Configuring ....................... 217
Acquisition Requirements ........................................ 218
ADCON0 Register .................................................... 213
ADCON1 Register .................................................... 213
ADCON2 Register .................................................... 213
ADRESH Register ............................................ 213, 216
ADRESL Register .................................................... 213
Analog Port Pins, Configuring .................................. 220
Associated Registers ............................................... 222
Calculating the Minimum Required Acquisition Time .....
218
Configuring the Module ............................................ 217
Conversion Clock (TAD) ........................................... 219
Conversion Status (GO/DONE Bit) .......................... 216
Conversions ............................................................. 221
Converter Characteristics ........................................ 349
Operation in Power Managed Modes ...................... 220
Selecting and Configuring Acquisition Time ............ 219
Special Event Trigger (CCP) .................................... 222
Special Event Trigger (ECCP) ................................. 140
Use of the CCP2 Trigger .......................................... 222
Absolute Maximum Ratings ............................................. 313
AC (Timing) Characteristics ............................................. 331
Load Conditions for Device Timing Specifications ... 332
Parameter Symbology ............................................. 331
Temperature and Voltage Specifications ................. 332
Timing Conditions .................................................... 332
AC Characteristics
Internal RC Accuracy ............................................... 334
Access Bank
Mapping with Indexed Literal Offset Addressing Mode ..
75
ACKSTAT ........................................................................ 183
ACKSTAT Status Flag ..................................................... 183
ADCON0 Register ............................................................ 213
GO/DONE Bit ........................................................... 216
ADCON1 Register ............................................................ 213
ADCON2 Register ............................................................ 213
ADDFSR .......................................................................... 302
ADDLW ............................................................................ 265
ADDULNK ........................................................................ 302
ADDWF ............................................................................ 265
ADDWFC ......................................................................... 266
ADRESH Register ............................................................ 213
ADRESL Register .................................................... 213, 216
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 266
ANDWF ............................................................................ 267
Assembler
MPASM Assembler .................................................. 310
Auto-Wake-up on Sync Break Character ......................... 206
B
Bank Select Register (BSR) ............................................... 61
Baud Rate Generator ....................................................... 179
BC .................................................................................... 267
BCF .................................................................................. 268
BF .................................................................................... 183
BF Status Flag ................................................................. 183
PIC18F2X1X/4X1X
Block Diagrams
A/D ........................................................................... 216
Analog Input Model .................................................. 217
Baud Rate Generator .............................................. 179
Capture Mode Operation ......................................... 133
Comparator Analog Input Model .............................. 227
Comparator I/O Operating Modes (Diagram) .......... 224
Comparator Output .................................................. 226
Comparator Voltage Reference ............................... 230
Comparator Voltage Reference Output Buffer Example
231
Compare Mode Operation ....................................... 134
Device Clock .............................................................. 30
Enhanced PWM ....................................................... 141
EUSART Receive .................................................... 204
EUSART Transmit ................................................... 202
External Power-on Reset Circuit (Slow VDD Power-up)
45
Fail-Safe Clock Monitor ........................................... 251
Generic I/O Port ......................................................... 97
High/Low-Voltage Detect with External Input .......... 234
Interrupt Logic ............................................................ 84
MSSP (I²C Master Mode) ........................................ 177
MSSP (I²C Mode) .................................................... 162
MSSP (SPI Mode) ................................................... 153
On-Chip Reset Circuit ................................................ 43
PIC18F2410/2510/2515/2610 ................................... 13
PIC18F4410/4510/4515/4610 ................................... 14
PLL (HS Mode) .......................................................... 27
PORTD and PORTE (Parallel Slave Port) ............... 112
PWM Operation (Simplified) .................................... 136
Reads from Flash Program Memory ......................... 78
Single Comparator ................................................... 225
Table Read Operation ............................................... 77
Timer0 in 16-Bit Mode ............................................. 116
Timer0 in 8-Bit Mode ............................................... 116
Timer1 ..................................................................... 120
Timer1 (16-Bit Read/Write Mode) ............................ 120
Timer2 ..................................................................... 126
Timer3 ..................................................................... 128
Timer3 (16-Bit Read/Write Mode) ............................ 128
Watchdog Timer ...................................................... 248
BN .................................................................................... 268
BNC ................................................................................. 269
BNN ................................................................................. 269
BNOV .............................................................................. 270
BNZ ................................................................................. 270
BOR. See Brown-out Reset.
BOV ................................................................................. 273
BRA ................................................................................. 271
Break Character (12-Bit) Transmit and Receive .............. 207
BRG. See Baud Rate Generator.
Brown-out Reset (BOR) ..................................................... 46
Detecting ................................................................... 46
Disabling in Sleep Mode ............................................ 46
Software Enabled ...................................................... 46
BSF .................................................................................. 271
BTFSC ............................................................................. 272
BTFSS ............................................................................. 272
BTG ................................................................................. 273
BZ .................................................................................... 274
© 2009 Microchip Technology Inc.
DS39636D-page 365