PIC18LF4610T-I Datasheet, PDF (290/376 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers

PIC18F2X1X/4X1X
RLNCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Rotate Left f (no carry)
RLNCF f {,d {,a}}
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f<n>) → dest<n + 1>,
(f<7>) → dest<0>
N, Z
0100 01da ffff ffff
The contents of register ‘f’ are rotated
one bit to the left. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result is
stored back in register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 23.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
register f
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
RLNCF
REG, 1, 0
Before Instruction
REG =
After Instruction
REG =
1010 1011
0101 0111
RRCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Rotate Right f through Carry
RRCF f {,d {,a}}
0 ≤ f ≤ 255
d ∈ [0,1]
a ∈ [0,1]
(f<n>) → dest<n – 1>,
(f<0>) → C,
(C) → dest<7>
C, N, Z
0011 00da ffff ffff
The contents of register ‘f’ are rotated
one bit to the right through the Carry
flag. If ‘d’ is ‘0’, the result is placed in W.
If ‘d’ is ‘1’, the result is placed back in
register ‘f’ (default).
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 23.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
C
register f
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
1
1
Q2
Read
register ‘f’
Q3
Process
Data
Q4
Write to
destination
Example:
RRCF
REG, 0, 0
Before Instruction
REG =
C
=
After Instruction
REG =
W
=
C
=
1110 0110
0
1110 0110
0111 0011
0
DS39636D-page 292
© 2009 Microchip Technology Inc.