PIC18LF4610T-I Datasheet, PDF (371/376 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers

Transition for Entry to Idle Mode ................................ 40
Transition for Entry to SEC_RUN Mode .................... 37
Transition for Entry to Sleep Mode ............................ 39
Transition for Two-Speed Start-up (INTOSC to HSPLL)
250
Transition for Wake from Idle to Run Mode ............... 40
Transition for Wake from Sleep (HSPLL) ................... 39
Transition from RC_RUN Mode to PRI_RUN Mode .. 38
Transition from SEC_RUN Mode to PRI_RUN Mode
(HSPLL) ............................................................. 37
Transition to RC_RUN Mode ..................................... 38
USART Synchronous Receive (Master/Slave) ........ 348
USART Synchronous Transmission (Master/Slave) 348
Timing Diagrams and Specifications ................................ 333
A/D Conversion Requirements ................................ 350
Capture/Compare/PWM (CCP) Requirements ........ 338
CLKO and I/O Requirements ................................... 335
Example SPI Mode Requirements (Master Mode,
CKE = 0) .......................................................... 340
Example SPI Mode Requirements (Master Mode,
CKE = 1) .......................................................... 341
Example SPI Mode Requirements (Slave Mode,
CKE = 0) .......................................................... 342
Example SPI Mode Requirements (Slave Mode,
CKE = 1) .......................................................... 343
External Clock Requirements .................................. 333
I²C Bus Data Requirements (Slave Mode) .............. 345
Master SSP I²C Bus Data Requirements ................ 347
Master SSP I²C Bus Start/Stop Bits Requirements . 346
Parallel Slave Port Requirements (PIC18F4410/4510/
4515/4610) ....................................................... 339
PLL Clock ................................................................. 334
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
er-up Timer and Brown-out Reset Requirements ..
336
Timer0 and Timer1 External Clock Requirements ... 337
USART Synchronous Receive Requirements ......... 348
USART Synchronous Transmission Requirements . 348
Top-of-Stack Access .......................................................... 56
TRISE Register
PSPMODE Bit .......................................................... 106
TSTFSZ ........................................................................... 299
Two-Speed Start-up ................................................. 239, 250
Two-Word Instructions
Example Cases .......................................................... 60
TXSTA Register
BRGH Bit ................................................................. 197
V
Voltage Reference Specifications .................................... 329
W
Watchdog Timer (WDT) ........................................... 239, 248
Associated Registers ............................................... 249
Control Register ....................................................... 248
During Oscillator Failure .......................................... 251
Programming Considerations .................................. 248
WCOL ...................................................... 181, 182, 183, 186
WCOL Status Flag ................................... 181, 182, 183, 186
WWW Address ................................................................. 375
WWW, On-Line Support ...................................................... 8
X
XORLW ............................................................................ 299
XORWF ............................................................................ 300
© 2009 Microchip Technology Inc.
PIC18F2X1X/4X1X
DS39636D-page 373