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PIC18F2525_08 Datasheet, PDF (51/412 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PIC18F2525/2620/4525/4620
TABLE 4-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via WDT
or Interrupt
TOSU
TOSH
TOSL
STKPTR
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2525 2620 4525 4620
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2525 2620 4525 4620
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 uuuu(3)
uuuu uuuu(3)
uuuu uuuu(3)
uu-u uuuu(3)
PCLATU
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---0 0000
---0 0000
---u uuuu
PCLATH
PCL
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0000 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
PC + 2(2)
TBLPTRU 2525 2620 4525 4620
--00 0000
--00 0000
--uu uuuu
TBLPTRH 2525 2620 4525 4620
0000 0000
0000 0000
uuuu uuuu
TBLPTRL
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0000 0000
0000 0000
uuuu uuuu
TABLAT
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0000 0000
0000 0000
uuuu uuuu
PRODH
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xxxx xxxx
uuuu uuuu
uuuu uuuu
PRODL
INTCON
INTCON2
INTCON3
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2525 2620 4525 4620
2525 2620 4525 4620
2525 2620 4525 4620
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
uuuu uuuu
uuuu uuuu(1)
uuuu -u-u(1)
uu-u u-uu(1)
INDF0
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N/A
N/A
N/A
POSTINC0 2525 2620 4525 4620
N/A
N/A
N/A
POSTDEC0 2525 2620 4525 4620
N/A
N/A
N/A
PREINC0
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N/A
N/A
N/A
PLUSW0
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N/A
N/A
N/A
FSR0H
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---- 0000
---- 0000
---- uuuu
FSR0L
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xxxx xxxx
uuuu uuuu
uuuu uuuu
WREG
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xxxx xxxx
uuuu uuuu
uuuu uuuu
INDF1
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N/A
N/A
N/A
POSTINC1 2525 2620 4525 4620
N/A
N/A
N/A
POSTDEC1 2525 2620 4525 4620
N/A
N/A
N/A
PREINC1
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N/A
N/A
N/A
PLUSW1
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N/A
N/A
N/A
Legend:
Note 1:
2:
3:
4:
5:
u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
See Table 4-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
© 2008 Microchip Technology Inc.
DS39626E-page 49