PIC18F2525_08 Datasheet, PDF (18/412 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2525/2620/4525/4620
TABLE 1-3: PIC18F4525/4620 PINOUT I/O DESCRIPTIONS
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP ^{Type Type}
Description
MCLR/VPP/RE3
MCLR
VPP
RE3
1 18 18
Master Clear (input) or programming voltage (input).
I
ST
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
P
Programming voltage input.
I
ST
Digital input.
OSC1/CLKI/RA7
OSC1
CLKI
RA7
13 32 30
Oscillator crystal or external clock input.
I
ST
Oscillator crystal input or external clock source input.
ST buffer when configured in RC mode;
analog otherwise.
I CMOS External clock source input. Always associated with
pin function OSC1. (See related OSC1/CLKI,
OSC2/CLKO pins.)
I/O TTL General purpose I/O pin.
OSC2/CLKO/RA6
OSC2
CLKO
RA6
14 33 31
Oscillator crystal or clock output.
O
—
Oscillator crystal output. Connects to crystal
or resonator in Crystal Oscillator mode.
O
—
In RC mode, OSC2 pin outputs CLKO which
has 1/4 the frequency of OSC1 and denotes
the instruction cycle rate.
I/O TTL General purpose I/O pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
3: For the QFN package, it is recommended that the bottom pad be connected to VSS.
DS39626E-page 16
© 2008 Microchip Technology Inc.