PIC18F2525_08 Datasheet, PDF (19/412 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2525/2620/4525/4620
TABLE 1-3: PIC18F4525/4620 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin Buffer
PDIP QFN TQFP ^{Type Type}
Description
PORTA is a bidirectional I/O port.
RA0/AN0
RA0
AN0
2 19 19
I/O TTL Digital I/O.
I Analog Analog input 0.
RA1/AN1
RA1
AN1
3 20 20
I/O TTL Digital I/O.
I Analog Analog input 1.
RA2/AN2/VREF-/CVREF 4
RA2
AN2
VREF-
CVREF
21 21
I/O TTL Digital I/O.
I Analog Analog input 2.
I Analog A/D reference voltage (low) input.
O Analog Comparator reference voltage output.
RA3/AN3/VREF+
RA3
AN3
VREF+
5 22 22
I/O TTL Digital I/O.
I Analog Analog input 3.
I Analog A/D reference voltage (high) input.
RA4/T0CKI/C1OUT
RA4
T0CKI
C1OUT
6 23 23
I/O ST
Digital I/O.
I
ST
Timer0 external clock input.
O
—
Comparator 1 output.
RA5/AN4/SS/HLVDIN/ 7
C2OUT
RA5
AN4
SS
HLVDIN
C2OUT
24 24
I/O TTL
I Analog
I TTL
I Analog
O
—
Digital I/O.
Analog input 4.
SPI slave select input.
High/Low-Voltage Detect input.
Comparator 2 output.
RA6
See the OSC2/CLKO/RA6 pin.
RA7
See the OSC1/CLKI/RA7 pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
O = Output
CMOS = CMOS compatible input or output
I
= Input
P
= Power
Note 1: Default assignment for CCP2 when the CCP2MX Configuration bit is set.
2: Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
3: For the QFN package, it is recommended that the bottom pad be connected to VSS.
© 2008 Microchip Technology Inc.
DS39626E-page 17