PIC18F2525_08 Datasheet, PDF (361/412 Pages) Microchip Technology – 28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2525/2620/4525/4620
FIGURE 26-22: EUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
RC6/TX/CK
pin
RC7/RX/DT
pin
125
126
Note: Refer to Figure 26-5 for load conditions.
TABLE 26-23: EUSART SYNCHRONOUS RECEIVE REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min Max
125 TdtV2ckl SYNC RCV (MASTER & SLAVE)
Data Hold before CK ↓ (DT hold time)
126 TckL2dtl Data Hold after CK ↓ (DT hold time)
10
—
15
—
Units
ns
ns
Conditions
TABLE 26-24: A/D CONVERTER CHARACTERISTICS: PIC18F2525/2620/4525/4620 (INDUSTRIAL)
PIC18LF2525/2620/4525/4620 (INDUSTRIAL)
Param
No.
Symbol
Characteristic
Min
Typ
Max Units
Conditions
A01 NR
Resolution
—
—
10
bit ΔVREF ≥ 3.0V
A03 EIL
Integral Linearity Error
—
—
<±1
LSb ΔVREF ≥ 3.0V
A04 EDL Differential Linearity Error
—
—
<±1
LSb ΔVREF ≥ 3.0V
A06 EOFF Offset Error
—
—
<±2.0 LSb ΔVREF ≥ 3.0V
A07 EGN
A10 —
Gain Error
Monotonicity
—
—
<±1
Guaranteed⁽¹⁾
LSb ΔVREF ≥ 3.0V
— VSS ≤ VAIN ≤ VREF
A20 ΔVREF Reference Voltage Range
(VREFH – VREFL)
1.8
—
—
V VDD < 3.0V
3
—
—
V VDD ≥ 3.0V
A21 VREFH Reference Voltage High
VSS
—
VREFH
V
A22 VREFL Reference Voltage Low
VSS – 0.3V — VDD – 3.0V V
A25 VAIN Analog Input Voltage
VREFL
—
VREFH
V
A30 ZAIN
Recommended Impedance of
Analog Voltage Source
—
—
2.5
kΩ
A40 IAD
A/D Current from PIC18FXXXX
—
VDD
PIC18LFXX20
—
A50 IREF VREF Input Current⁽²⁾
—
—
180
—
μA Average current during
90
—
μA ^conversion
—
5
μA During VAIN acquisition.
—
150
μA During A/D conversion
cycle.
Note 1: The A/D conversion result never decreases with an increase in the input voltage and has no missing
codes.
2: VREFH current is from RA3/AN3/VREF+ pin or VDD, whichever is selected as the VREFH source.
VREFL current is from RA2/AN2/VREF-/CVREF pin or VSS, whichever is selected as the VREFL source.
© 2008 Microchip Technology Inc.
DS39626E-page 359