English
Language : 

PIC24F16KL402 Datasheet, PDF (221/260 Pages) Microchip Technology – Low-Power, Low-Cost, General Purpose 16-Bit Flash Microcontrollers with nanoWatt XLP Technology
PIC24F16KL402 FAMILY
FIGURE 26-13: MSSP I2C™ BUS DATA TIMING
SCLx
SDAx
In
SDAx
Out
103
90
91
109
100
101
106
107
109
Note: Refer to Figure 26-2 for load conditions.
102
92
110
TABLE 26-34: I2C™ BUS DATA REQUIREMENTS (MASTER MODE)
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
100 THIGH Clock High Time 100 kHz mode 2(TOSC)(BRG + 1) —
—
400 kHz mode 2(TOSC)(BRG + 1) —
—
101 TLOW Clock Low Time 100 kHz mode 2(TOSC)(BRG + 1) —
—
400 kHz mode 2(TOSC)(BRG + 1) —
—
102 TR
SDAx and SCLx 100 kHz mode
Rise Time
400 kHz mode
—
20 + 0.1 CB
1000
300
ns CB is specified to be from
ns 10 to 400 pF
103 TF
SDAx and SCLx 100 kHz mode
Fall Time
400 kHz mode
—
20 + 0.1 CB
300 ns CB is specified to be from
300 ns 10 to 400 pF
90
TSU:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) —
— Only relevant for Repeated
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
— Start condition
91
THD:STA Start Condition 100 kHz mode 2(TOSC)(BRG + 1) —
— After this period, the first
Hold Time
400 kHz mode 2(TOSC)(BRG + 1) —
— clock pulse is generated
106 THD:DAT Data Input
100 kHz mode
0
Hold Time
400 kHz mode
0
—
ns
0.9 s
107 TSU:DAT Data Input
100 kHz mode
250
Setup Time
400 kHz mode
100
—
ns (Note 1)
—
ns
92
TSU:STO Stop Condition 100 kHz mode 2(TOSC)(BRG + 1) —
—
Setup Time
400 kHz mode 2(TOSC)(BRG + 1) —
—
109 TAA
Output Valid 100 kHz mode
—
3500 ns
from Clock
400 kHz mode
—
1000 ns
110 TBUF Bus Free Time 100 kHz mode
4.7
400 kHz mode
1.3
—
s Time the bus must be free
—
s before a new transmission
can start
D102 CB
Bus Capacitive Loading
—
400 pF
Note 1: A Fast mode I2C bus device can be used in a Standard mode I2C bus system, but Parameter  250 ns
must then be met. This will automatically be the case if the device does not stretch the LOW period of the
SCLx signal. If such a device does stretch the LOW period of the SCLx signal, it must output the next data
bit to the SDAx line, Parameter + Parameter = 1000 + 250 = 1250 ns (for 100 kHz mode), before the SCLx
line is released.
 2011 Microchip Technology Inc.
DS31037B-page 221