PIC24F16KL402 Datasheet, PDF (138/260 Pages) Microchip Technology – Low-Power, Low-Cost, General Purpose 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

PIC24F16KL402 FAMILY
REGISTER 17-1: SSPxSTAT: MSSPx STATUS REGISTER (SPI MODE)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
R/W-0
R/W-0
R-0
R-0
R-0
R-0
R-0
R-0
SMP
CKE⁽¹⁾
D/A
P
S
R/W
UA
BF
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
SMP: Sample bit
SPI Master mode:
1 = Input data is sampled at the end of data output time
0 = Input data is sampled at the middle of data output time
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode.
CKE: SPI Clock Select bit⁽¹⁾
1 = Transmit occurs on transition from active to Idle clock state
0 = Transmit occurs on transition from Idle to active clock state
D/A: Data/Address bit
Used in I²C™ mode only.
P: Stop bit
Used in I²C mode only. This bit is cleared when the MSSPx module is disabled; SSPEN is cleared.
S: Start bit
Used in I²C mode only.
R/W: Read/Write Information bit
Used in I²C mode only.
UA: Update Address bit
Used in I²C mode only.
BF: Buffer Full Status bit
1 = Receive is complete, SSPxBUF is full
0 = Receive is not complete, SSPxBUF is empty
Note 1: Polarity of clock state is set by the CKP bit (SSPxCON1<4>).
DS31037B-page 138
 2011 Microchip Technology Inc.