PIC24F16KL402 Datasheet, PDF (143/260 Pages) Microchip Technology – Low-Power, Low-Cost, General Purpose 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

PIC24F16KL402 FAMILY
REGISTER 17-5: SSPxCON2: MSSPx CONTROL REGISTER 2 (I²C™ MODE)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
R/W-0
GCEN
bit 7
R/W-0
ACKSTAT
R/W-0
ACKDT⁽¹⁾
R/W-0
ACKEN⁽²⁾
R/W-0
RCEN⁽²⁾
R/W-0
PEN⁽²⁾
R/W-0
RSEN⁽²⁾
R/W-0
SEN⁽²⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
GCEN: General Call Enable bit (Slave mode only)
1 = Enables interrupt when a general call address (0000h) is received in the SSPxSR
0 = General call address is disabled
ACKSTAT: Acknowledge Status bit (Master Transmit mode only)
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (Master Receive mode only)⁽¹⁾
1 = No Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (Master mode only)⁽²⁾
1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits ACKDT data bit;
automatically cleared by hardware
0 = Acknowledge sequence is Idle
RCEN: Receive Enable bit (Master Receive mode only)⁽²⁾
1 = Enables Receive mode for I²C
0 = Receive is Idle
PEN: Stop Condition Enable bit (Master mode only)⁽²⁾
1 = Initiates Stop condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Stop condition is Idle
RSEN: Repeated Start Condition Enable bit (Master mode only)⁽²⁾
1 = Initiates Repeated Start condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Repeated Start condition is Idle
SEN: Start Condition Enable bit⁽²⁾
Master Mode:
1 = Initiates Start condition on SDAx and SCLx pins; automatically cleared by hardware
0 = Start condition is Idle
Slave Mode:
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch is enabled)
0 = Clock stretching is disabled
Note 1:
2:
The value that will be transmitted when the user initiates an Acknowledge sequence at the end of a
receive.
If the I²C module is active, these bits may not be set (no spooling) and the SSPxBUF may not be written
(or writes to the SSPxBUF are disabled).
 2011 Microchip Technology Inc.
DS31037B-page 143