PIC24F16KL402 Datasheet, PDF (128/260 Pages) Microchip Technology – Low-Power, Low-Cost, General Purpose 16-Bit Flash Microcontrollers with nanoWatt XLP Technology

PIC24F16KL402 FAMILY
REGISTER 16-1: CCPxCON: CCPx CONTROL REGISTER (STANDARD CCP MODULES)
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
DCxB1
DCxB0
CCPxM3⁽¹⁾ CCPxM2⁽¹⁾ CCPxM1⁽¹⁾ CCPxM0⁽¹⁾
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-6
bit 5-4
bit 3-0
Unimplemented: Read as ‘0’
DCxB<1:0>: PWM Duty Cycle Bit 1 and Bit 0 for CCPx Module
Capture and Compare modes:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight
Most Significant bits (DCxB<9:2>) of the duty cycle are found in CCPRxL.
CCPxM<3:0>: CCPx Module Mode Select bits⁽¹⁾
1111 = Reserved
1110 = Reserved
1101 = Reserved
1100 = PWM mode
1011 = Compare mode: Special Event Trigger; reset timer on CCPx match (CCPxIF bit is set)
1010 = Compare mode: Generate software interrupt on compare match (CCPxIF bit is set, CCPx pin
reflects I/O state)
1001 = Compare mode: Initialize CCPx pin high; on compare match, force CCPx pin low (CCPxIF
bit is set)
1000 = Compare mode: Initialize CCPx pin low; on compare match, force CCPx pin high (CCPxIF bit is
set)
0111 = Capture mode: Every 16th rising edge
0110 = Capture mode: Every 4th rising edge
0101 = Capture mode: Every rising edge
0100 = Capture mode: Every falling edge
0011 = Reserved
0010 = Compare mode: Toggle output on match (CCPxIF bit is set)
0001 = Reserved
0000 = Capture/Compare/PWM is disabled (resets CCPx module)
Note 1: CCPxM<3:0> = 1011 will only reset the timer and not start the A/D conversion on a CCPx match.
DS31037B-page 128
 2011 Microchip Technology Inc.