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PIC24F16KL402 Datasheet, PDF (125/260 Pages) Microchip Technology – Low-Power, Low-Cost, General Purpose 16-Bit Flash Microcontrollers with nanoWatt XLP Technology
PIC24F16KL402 FAMILY
16.0 CAPTURE/COMPARE/PWM
(CCP) AND ENHANCED CCP
MODULES
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive
reference source. For more information
on the Capture/Compare/PWM module,
refer to the “PIC24F Family Reference
Manual”.
Depending on the particular device, PIC24F16KL402
family devices include up to three CCP and/or ECCP
modules. Key features of all CCP modules include:
• 16-bit input capture for a range of edge events
• 16-bit output compare with multiple output options
• Single-output Pulse Width Modulation (PWM) with
up to 10 bits of resolution
• User-selectable time base from any available
timer
• Special Event Trigger on capture and compare
events to automatically trigger a range of
peripherals
ECCP modules also include these features:
• Operation in Half-Bridge and Full-Bridge (Forward
and Reverse) modes
• Pulse steering control across any or all Enhanced
PWM pins, with user-configurable steering
synchronization
• User-configurable External Fault Detect with
Auto-Shutdown and Auto Restart
PIC24FXXKL40X/30X devices instantiate three CCP
modules, one Enhanced (CCP1) and two standard
(CCP2 and CCP). All other devices instantiate two
standard CCP modules (CCP1 and CCP2).
16.1 Timer Selection
On all PIC24F16KL402 family devices, the CCP and
ECCP modules use Timer3 as the time base for cap-
ture and compare operations. PWM and Enhanced
PWM operations may use either Timer2 or Timer4.
PWM time base selection is done through the
CCPTMRS0 register (Register 16-6).
16.2 CCP I/O Pins
To configure I/O pins with a CCP function, the proper
mode must be selected by setting the CCPxM<3:0>
bits.
Where the Enhanced CCP module is available, it may
have up to four PWM outputs, depending on the
selected operating mode. These outputs are desig-
nated, P1A through P1D. The outputs that are active
depend on the ECCP operating mode selected. To
configure I/O pins for Enhanced PWM operation, the
proper PWM mode must be selected by setting the
PM<1:0> and CCPM<3:0> bits.
 2011 Microchip Technology Inc.
DS31037B-page 125