71M6541D Datasheet, PDF (7/166 Pages) Maxim Integrated Products – 0.1% Accuracy Over 2000:1 Current Range Energy Meter ICs

71M6541D/F/G and 71M6542F/G Data Sheet
Table 53: Data/Direction Registers for SEGDIO16 to SEGDIO31 (71M6542F/G) ................................... 64
Table 54: Data/Direction Registers for SEGDIO32 to SEGDIO45 (71M6542F/G) ................................... 64
Table 55: Data/Direction Registers for SEGDIO51 to SEGDIO55 (71M6542F/G) ................................... 64
Table 56: LCD_VMODE[1:0] Configurations.......................................................................................... 65
Table 57: LCD Configurations............................................................................................................... 67
Table 58: 71M6541D/F/G LCD Data Registers for SEG46 to SEG50 ..................................................... 69
Table 59: 71M6542F/G LCD Data Registers for SEG46 to SEG50......................................................... 70
Table 60: EECTRL Bits for 2-pin Interface............................................................................................... 71
Table 61: EECTRL Bits for the 3-wire Interface ....................................................................................... 71
Table 62: SPI Transaction Fields ........................................................................................................... 74
Table 63: SPI Command Sequences ..................................................................................................... 75
Table 64: SPI Registers......................................................................................................................... 76
Table 65: TMUX[5:0] Selections ............................................................................................................ 79
Table 66: TMUX2[4:0] Selections........................................................................................................... 79
Table 67: Available Circuit Functions ..................................................................................................... 82
Table 68: VSTAT[2:0] (SFR 0xF9[2:0]) .................................................................................................... 85
Table 69: Wake Enables and Flag Bits .................................................................................................. 87
Table 70: Wake Bits .............................................................................................................................. 89
Table 71: Clear Events for WAKE flags.................................................................................................. 90
Table 72: GAIN_ADJn Compensation Channels .................................................................................... 98
Table 73: GAIN_ADJn Compensation Channels .................................................................................. 100
Table 74: I/O RAM Map – Functional Order, Basic Configuration ......................................................... 105
Table 75: I/O RAM Map – Functional Order ......................................................................................... 107
Table 76: I/O RAM Map – Functional Order ......................................................................................... 111
Table 77. Standard CE Codes ............................................................................................................. 125
Table 78: CE EQU Equations and Element Input Mapping ................................................................... 126
Table 79: CE Raw Data Access Locations ........................................................................................... 127
Table 80: CESTATUS Register.............................................................................................................. 127
Table 81: CESTATUS (CE RAM 0x80) Bit Definitions .............................................................................. 128
Table 82: CECONFIG Register............................................................................................................. 128
Table 83: CECONFIG (CE RAM 0x20) Bit Definitions ............................................................................. 128
Table 84: Sag Threshold and Gain Adjust Control................................................................................ 129
Table 85: CE Transfer Variables (with Local Sensors).......................................................................... 130
Table 86: CE Transfer Variables (with Remote Sensor) ....................................................................... 130
Table 87: CE Energy Measurement Variables (with Local Sensors) ..................................................... 131
Table 88: CE Energy Measurement Variables (with Remote Sensor) ................................................... 131
Table 89: Other Transfer Variables ...................................................................................................... 132
Table 90: CE Pulse Generation Parameters......................................................................................... 133
Table 91: CE Parameters for Noise Suppression and Code Version..................................................... 134
Table 92: CE Calibration Parameters................................................................................................... 135
Table 93: Absolute Maximum Ratings.................................................................................................. 138
Table 95: Recommended Operating Conditions................................................................................... 139
Table 96: Input Logic Levels ................................................................................................................ 140
Table 97: Output Logic Levels ............................................................................................................. 140
Table 98: Battery Monitor Performance Specifications (TEMP_BAT= 1) ................................................ 141
Table 99. Temperature Monitor............................................................................................................ 141
Table 100: Supply Current Performance Specifications........................................................................ 142
Table 101: V3P3D Switch Performance Specifications......................................................................... 143
Table 102. Internal Power Fault Comparator Specifications ................................................................. 143
Table 103: 2.5 V Voltage Regulator Performance Specifications .......................................................... 143
Table 104: Low-Power Voltage Regulator Performance Specifications................................................. 144
Table 105: Crystal Oscillator Performance Specifications..................................................................... 144
Table 106: PLL Performance Specifications......................................................................................... 144