71M6541D Datasheet, PDF(33/166 Page) Maxim Integrated Products – 0.1% Accuracy Over 2000:1 Current Range Energy Meter ICs

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71M6541D Datasheet, PDF (33/166 Pages) Maxim Integrated Products – 0.1% Accuracy Over 2000:1 Current Range Energy Meter ICs

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71M6541D/F/G and 71M6542F/G Data Sheet

An alternative data pointer is available in the form of the PDATA register (SFR 0xBF), sometimes referred

to as USR2). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruction

MOVX A,@Ri or MOVX @Ri,A.

Internal Data Memory Map and Access

The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory

address is always 1 byte wide. Table 11 shows the internal data memory map.

The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memory

is available only by direct addressing. Indirect addressing of this area accesses the upper 128 bytes of

Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32

bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW, SFR

0xD0 ) select which bank is in use. The next 16 bytes form a block of bit addressable memory space at

addresses 0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect

addressing.

Table 11: Internal Data Memory Map

Address Range

Direct Addressing

Indirect Addressing

0x80 0xFF Special Function Registers (SFRs)

RAM

0x30 0x7F

Byte addressable area

0x20

0x00

0x2F

0x1F

Bit addressable area

2.4.2 Special Function Registers (SFRs)

A map of the Special Function Registers is shown in Table 12.

Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read

access to unimplemented addresses returns undefined data, while a write access has no effect. SFRs

specific to the 71M654x are shown in bold print on a shaded field. The registers at 0x80, 0x88, 0x90,

etc., are bit addressable, all others are byte addressable.

Table 12: Special Function Register Map

Hex/

Bin

Bit

Addressable

X000

X001

X010

Byte Addressable

X011 X100 X101

X110

Bin/

Hex

X111

INTBITS VSTAT

RCMD SPI_CMD

IFLAGS

WDCON

PSW

T2CON

IRCON

IEN1

IP1 S0RELH S1RELH

PDATA BF

B0 P3 (DIO12:15)

FLSHCTL

FLSHPG B7

IEN0

IP0 S0RELL

A0 P2 (DIO8:11)

S0CON S0BUF IEN2 S1CON S1BUF S1RELL EEDATA EECTRL 9F

90 P1(DIO4:7)

DPS

ERASE

TCON TMOD TL0

TL1

TH0

TH1 CKCON

80 P0 (DIO0:3) SP

DPL

DPH DPL1 DPH1

PCON 87

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