71M6541D Datasheet, PDF (118/166 Pages) Maxim Integrated Products – 0.1% Accuracy Over 2000:1 Current Range Energy Meter ICs

71M6541D/F/G and 71M6542F/G Data Sheet
Name
LCD_VMODE[1:0]
LCD_Y
LKPADDR[6:0]
LKPAUTOI
LKPDAT[7:0]
LKP_RD
LKP_WR
MPU_DIV[2:0]
MUX0_SEL[3:0]
MUX1_SEL[3:0]
MUX2_SEL[3:0]
MUX3_SEL[3:0]
MUX4_SEL[3:0]
MUX5_SEL[3:0]
MUX6_SEL[3:0]
MUX7_SEL[3:0]
MUX8_SEL[3:0]
MUX9_SEL[3:0]
MUX10_SEL[3:0]
Location
2401[7:6]
2400[2]
2887[6:0]
2887[7]
2888[7:0]
2889[1]
2889[0]
2200[2:0]
2105[3:0]
2105[7:4]
2104[3:0]
2104[7:4]
2103[3:0]
2103[7:4]
2102[3:0]
2102[7:4]
2101[3:0]
2101[7:4]
2100[3:0]
Rst Wk Dir Description
Specifies how VLCD is generated. See 2.5.8.4 for the definition of V3P3L.
LCD_VMODE Description
00 00 R/W
11
External VLCD
10
LCD boost and LCD DAC enabled
01
LCD DAC enabled
00
No boost and no DAC. VLCD=V3P3L.
0
–
R/W
LCD Blink Frequency (ignored if blink is disabled).
1 = 1 Hz, 0 = 0.5 Hz
0 0 R/W The address for reading and writing the RTC lookup RAM
Auto-increment flag. When set, LKPADDR auto-increments every time
0 0 R/W LKP_RD or LKP_WR is pulsed. The incremented address can be read at
LKPADDR[6:0].
0 0 R/W The data for reading and writing the RTC lookup RAM.
Strobe bits for the RTC lookup RAM read and write. When set, the
LKPADDR[6:0] field and LKPDAT register is used in a read or write
0 0 R/W _{operation. When a strobe is set, it stays set until the operation completes, at}
0 0 R/W _{which time the strobe is cleared and LKPADDR[6:0] is incremented if the}
LKPAUTOI bit is set.
MPU clock rate is:
MPU Rate = MCK Rate * 2^{-(2+MPU_DIV[2:0])}.
0 0 R/W ^{The maximum value for MPU_DIV[2:0] is 4. Based on the default values of}
the PLL_FAST bit and MPU_DIV[2:0], the power up MPU rate is 6.29 MHz / 4
= 1.5725 MHz. The minimum MPU clock rate is 38.4 kHz when PLL_FAS T =
1.
0 0 R/W Selects which ADC input is to be converted during time slot 0.
0 0 R/W Selects which ADC input is to be converted during time slot 1.
0 0 R/W Selects which ADC input is to be converted during time slot 2.
0 0 R/W Selects which ADC input is to be converted during time slot 3.
0 0 R/W Selects which ADC input is to be converted during time slot 4.
0 0 R/W Selects which ADC input is to be converted during time slot 5.
0 0 R/W Selects which ADC input is to be converted during time slot 6.
0 0 R/W Selects which ADC input is to be converted during time slot 7.
0 0 R/W Selects which ADC input is to be converted during time slot 8.
0 0 R/W Selects which ADC input is to be converted during time slot 9.
0 0 R/W Selects which ADC input is to be converted during time slot 10.